On 08/04/2025 14:51, Luca Fancellu wrote:
Hi Ayan,
Hi Luca,
On 8 Apr 2025, at 14:32, Ayan Kumar Halder <ayank...@amd.com> wrote:
Hi Luca,
On 07/04/2025 10:14, Luca Fancellu wrote:
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Implement the function setup_mpu that will logically track the MPU
regions defined by hardware registers, start introducing data
structures and functions to track the status from the C world.
The xen_mpumap_mask bitmap is used to track which MPU region are
enabled at runtime.
This function is called from setup_mm() which full implementation
will be provided in a later stage.
Signed-off-by: Luca Fancellu <luca.fance...@arm.com>
---
xen/arch/arm/include/asm/arm64/mpu.h | 2 ++
xen/arch/arm/mpu/mm.c | 49 +++++++++++++++++++++++++++-
2 files changed, 50 insertions(+), 1 deletion(-)
diff --git a/xen/arch/arm/include/asm/arm64/mpu.h
b/xen/arch/arm/include/asm/arm64/mpu.h
index 7cf8d355a1af..ff5a957bf085 100644
--- a/xen/arch/arm/include/asm/arm64/mpu.h
+++ b/xen/arch/arm/include/asm/arm64/mpu.h
@@ -6,6 +6,8 @@
#ifndef __ARM_ARM64_MPU_H__
#define __ARM_ARM64_MPU_H__
+#define PRENR_MASK GENMASK(31, 0)
This can be moved to xen/arch/arm/include/asm/mpu.h
I can see from the Arm® Cortex®-R52 Processor TRM, r1p1, 3.3.46 Hyp MPU Region
Enable Register,
that HPRENR can have 16/20/24 enabled bits, the rest is RAZ.
Yes, I see that. However, if you see ARM DDI 0568A.c ID110520 ArmV8-R32
supplement
E2.2.4 HPRENR
Provides direct access to the HPRLAR.EN bits for EL2 MPU regions 0 to 31.
AFAIU, the maximum number of EL2 MPU regions will always be 32. This
doesnot seem to be configurable.
The R52 TRM isn't clear when it says "{no,16,20,24} EL2-controlled MPU
regions implemented" as there is no register to set/check how many EL2
MPU regions are implemented.
So, I suggest we can keep this in the common file for now.
- Ayan
Because of that I’ve put that here, maybe you should implement it in the arm32
part since you have this
difference from Arm64.
Cheers,
Luca
