On 06.05.2025 10:31, Roger Pau Monne wrote: > The current underlying implementation of GNTTABOP_cache_flush on x86 won't > work as expected. The provided {clean,invalidate}_dcache_va_range() > helpers only do a local pCPU cache flush, so the cache of previous pCPUs > where the vCPU might have run are not flushed. > > However instead of attempting to fix this, make the GNTTABOP_cache_flush > operation only available to ARM. There are no known users on x86, the > implementation is broken, and other architectures don't have grant-table > support yet. > > With that operation not implemented on x86, the related > {clean,invalidate}_dcache_va_range() helpers can also be removed. > > Fixes: f62dc81c2df7 ("x86: introduce more cache maintenance operations") > Fixes: 18e8d22fe750 ("introduce GNTTABOP_cache_flush") > Signed-off-by: Roger Pau Monné <roger....@citrix.com>
Ah, here we go. I think this is what we want, without patch 3. It will want to come with a CHANGELOG entry, though. > --- a/xen/common/grant_table.c > +++ b/xen/common/grant_table.c > @@ -940,6 +940,7 @@ static void reduce_status_for_pin(struct domain *rd, > gnttab_clear_flags(rd, clear_flags, status); > } > > +#ifdef CONFIG_ARM Better introduce a new Kconfig setting (e.g. HAS_GRANT_CACHE_FLUSH) right away, in case RISC-V and/or PPC would also want such behavior? Jan