While unlikely, it's possible for PCI devices to not have any IO resources
assigned, yet in such case the owner domain might still need to issue cache
control operations in case the device performs DMA requests.
Adjust cache_flush_permitted() to account for has_arch_pdevs().
While there also switch l1_disallow_mask() to use cache_flush_permitted().
This should be a non-functional change after the adjustment done to
cache_flush_permitted().
Signed-off-by: Roger Pau Monné <roger....@citrix.com>
---
Changes since v1:
- New in this version.
---
xen/arch/x86/include/asm/iocap.h | 3 ++-
xen/arch/x86/mm.c | 4 +---
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/include/asm/iocap.h b/xen/arch/x86/include/asm/iocap.h
index 61d026dbf5f6..f948b7186e95 100644
--- a/xen/arch/x86/include/asm/iocap.h
+++ b/xen/arch/x86/include/asm/iocap.h
@@ -19,7 +19,8 @@
(!rangeset_is_empty((d)->iomem_caps) || \
!rangeset_is_empty((d)->arch.ioport_caps))
-#define cache_flush_permitted has_arch_io_resources
+#define cache_flush_permitted(d) \
+ (has_arch_io_resources(d) || has_arch_pdevs(d))
static inline int ioports_permit_access(struct domain *d, unsigned long s,
unsigned long e)
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index a1703db762e3..657623336c0e 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -172,9 +172,7 @@ static DEFINE_SPINLOCK(subpage_ro_lock);
#define l1_disallow_mask(d) \
(((d) != dom_io) && \
- (rangeset_is_empty((d)->iomem_caps) && \
- rangeset_is_empty((d)->arch.ioport_caps) && \
- !has_arch_pdevs(d) && \
+ (!cache_flush_permitted(d) && \
is_pv_domain(d)) ? \
L1_DISALLOW_MASK : (L1_DISALLOW_MASK & ~PAGE_CACHE_ATTRS))
--
2.48.1
