On 27/08/2025 18:35, Hari Limaye wrote:
> From: Luca Fancellu <luca.fance...@arm.com>
>
> Add a scheme to distinguish transient MPU regions, to identify MPU
> regions which will be mapped for a short period of time. This is needed
> for the functions which transiently map and unmap memory ranges on
> demand which will be introduced in a future commit.
>
> Signed-off-by: Luca Fancellu <luca.fance...@arm.com>
> Signed-off-by: Hari Limaye <hari.lim...@arm.com>
> ---
> Changes from v1:
> - Improve commit message
> - Mark parameter in read helper as const
> ---
> xen/arch/arm/include/asm/arm32/mpu.h | 2 ++
> xen/arch/arm/include/asm/arm64/mpu.h | 2 ++
> xen/arch/arm/include/asm/mpu/mm.h | 14 +++++++++++++-
> xen/arch/arm/include/asm/mpu/regions.inc | 19 +++++++++++++++++--
> xen/arch/arm/mpu/mm.c | 23 ++++++++++++++---------
> 5 files changed, 48 insertions(+), 12 deletions(-)
>
> diff --git a/xen/arch/arm/include/asm/arm32/mpu.h
> b/xen/arch/arm/include/asm/arm32/mpu.h
> index 0a6930b3a0..9906d98809 100644
> --- a/xen/arch/arm/include/asm/arm32/mpu.h
> +++ b/xen/arch/arm/include/asm/arm32/mpu.h
> @@ -39,6 +39,8 @@ typedef union {
> typedef struct {
> prbar_t prbar;
> prlar_t prlar;
> + bool transient;
Do we expect to have any other flags? If so, it could make sense to use a
bitfield right away.
> + uint8_t pad[7]; /* Pad structure to 16 Bytes */
> } pr_t;
>
> #endif /* __ASSEMBLY__ */
> diff --git a/xen/arch/arm/include/asm/arm64/mpu.h
> b/xen/arch/arm/include/asm/arm64/mpu.h
> index f0ce344e78..1d1843eda0 100644
> --- a/xen/arch/arm/include/asm/arm64/mpu.h
> +++ b/xen/arch/arm/include/asm/arm64/mpu.h
> @@ -38,6 +38,8 @@ typedef union {
> typedef struct {
> prbar_t prbar;
> prlar_t prlar;
> + bool transient;
> + uint8_t pad[15]; /* Pad structure to 32 Bytes */
> } pr_t;
>
> #endif /* __ASSEMBLY__ */
> diff --git a/xen/arch/arm/include/asm/mpu/mm.h
> b/xen/arch/arm/include/asm/mpu/mm.h
> index e1ded6521d..566d338986 100644
> --- a/xen/arch/arm/include/asm/mpu/mm.h
> +++ b/xen/arch/arm/include/asm/mpu/mm.h
> @@ -55,6 +55,16 @@ static inline void context_sync_mpu(void)
> isb();
> }
>
> +static inline bool region_is_transient(const pr_t *pr)
> +{
> + return pr->transient;
> +}
> +
> +static inline void region_set_transient(pr_t *pr, bool transient)
> +{
> + pr->transient = transient;
> +}
> +
> /*
> * The following API requires context_sync_mpu() after being used to modify
> MPU
> * regions:
> @@ -75,9 +85,11 @@ void write_protection_region(const pr_t *pr_write, uint8_t
> sel);
> * @param base Base address of the range to map (inclusive).
> * @param limit Limit address of the range to map (exclusive).
> * @param flags Flags for the memory range to map.
> + * @param transient True for a transient mapping, otherwise False.
> * @return 0 on success, negative on error.
> */
> -int xen_mpumap_update(paddr_t base, paddr_t limit, unsigned int flags);
> +int xen_mpumap_update(paddr_t base, paddr_t limit, unsigned int flags,
> + bool transient);
>
> /*
> * Creates a pr_t structure describing a protection region.
> diff --git a/xen/arch/arm/include/asm/mpu/regions.inc
> b/xen/arch/arm/include/asm/mpu/regions.inc
> index 23fead3b21..f9892fe3d8 100644
> --- a/xen/arch/arm/include/asm/mpu/regions.inc
> +++ b/xen/arch/arm/include/asm/mpu/regions.inc
> @@ -14,19 +14,31 @@
> #define PRLAR_ELx_EN 0x1
>
> #ifdef CONFIG_ARM_64
> -#define XEN_MPUMAP_ENTRY_SHIFT 0x4 /* 16 byte structure */
> +#define XEN_MPUMAP_ENTRY_SHIFT 0x5 /* 32 byte structure */
> +#define XEN_MPUMAP_ENTRY_ZERO_OFFSET 0x10 /* {PRBAR, PRLAR} is 16 bytes */
To avoid having to update this over and over again, maybe define a macro using
OFFSET?
Other than that:
Reviewed-by: Michal Orzel <michal.or...@amd.com>
~Michal
