On 04.10.2025 00:53, Andrew Cooper wrote: > ... and rdmsr() while here. > > Most of these accesses are in fastpaths and do not need serialising behaviour, > but the write side is serialising on all Intel hardware as well as older AMD > hardware. > > No functional change. > > Signed-off-by: Andrew Cooper <[email protected]>
Acked-by: Jan Beulich <[email protected]> in the interest of not blocking the tidying over ... > --- a/xen/arch/x86/hvm/vmx/vmx.c > +++ b/xen/arch/x86/hvm/vmx/vmx.c > @@ -2737,8 +2737,8 @@ static uint64_t cf_check vmx_get_reg(struct vcpu *v, > unsigned int reg) > case MSR_SHADOW_GS_BASE: > if ( v != curr ) > return v->arch.hvm.vmx.shadow_gs; > - rdmsrl(MSR_SHADOW_GS_BASE, val); > - return val; > + else > + return rdmsr(MSR_SHADOW_GS_BASE); ... the addition of useless (and confusing, and possibly being Misra violations) "else" here and elsewhere. If you were to drop them, feel free to "upgrade" to R-b. Jan
