When setting a timer's config register, timer_sanitize_int_route will always reset the IRQ route value to what's valid corresponding to the !HPET_CFG_LEGACY case. This is applied even if the HPET is set to HPET_CFG_LEGACY.
When some operating systems (e.g. Windows) try to write to a timer config, they will verify and rewrite the register if the values don't match what they expect. This causes an unnecessary write to HPET_Tn_CFG. Note, the HPET specification states that for the Tn_INT_ROUTE_CNF field: "If the value is not supported by this prarticular timer, then the value read back will not match what is written. [...] If the LegacyReplacement Route bit is set, then Timers 0 and 1 will have a different routing, and this bit field has no effect for those two timers." Therefore, Xen should not reset timer_int_route if legacy mode is enabled, regardless of what's in there. Signed-off-by: Tu Dinh <[email protected]> --- xen/arch/x86/hvm/hpet.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/hvm/hpet.c b/xen/arch/x86/hvm/hpet.c index f0e5f877f4..fb2f4f94aa 100644 --- a/xen/arch/x86/hvm/hpet.c +++ b/xen/arch/x86/hvm/hpet.c @@ -48,6 +48,8 @@ #define timer_is_32bit(h, n) (timer_config(h, n) & HPET_TN_32BIT) #define hpet_enabled(h) ((h)->hpet.config & HPET_CFG_ENABLE) #define timer_level(h, n) (timer_config(h, n) & HPET_TN_LEVEL) +#define timer_is_legacy(h, n) \ + (((n) <= 1) && ((h)->hpet.config & HPET_CFG_LEGACY)) #define timer_int_route(h, n) MASK_EXTR(timer_config(h, n), HPET_TN_ROUTE) @@ -244,7 +246,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn, (timer_level(h, tn) && test_bit(tn, &h->hpet.isr)) ) return; - if ( !timer_int_route_valid(h, tn) ) + if ( !timer_is_legacy(h, tn) && !timer_int_route_valid(h, tn) ) { ASSERT_UNREACHABLE(); return; @@ -275,7 +277,7 @@ static void hpet_set_timer(HPETState *h, unsigned int tn, ? (uint32_t)diff : 0; destroy_periodic_time(&h->pt[tn]); - if ( (tn <= 1) && (h->hpet.config & HPET_CFG_LEGACY) ) + if ( timer_is_legacy(h, tn) ) { /* if LegacyReplacementRoute bit is set, HPET specification requires timer0 be routed to IRQ0 in NON-APIC or IRQ2 in the I/O APIC, @@ -323,7 +325,7 @@ static inline uint64_t hpet_fixup_reg( static void timer_sanitize_int_route(HPETState *h, unsigned int tn) { - if ( timer_int_route_valid(h, tn) ) + if ( timer_is_legacy(h, tn) || timer_int_route_valid(h, tn) ) return; timer_config(h, tn) &= ~HPET_TN_ROUTE; @@ -379,6 +381,9 @@ static int cf_check hpet_write( h->hpet.config = hpet_fixup_reg(new_val, old_val, HPET_CFG_ENABLE | HPET_CFG_LEGACY); + for ( i = 0; i < HPET_TIMER_NUM; i++ ) + timer_sanitize_int_route(h, i); + if ( !(old_val & HPET_CFG_ENABLE) && (new_val & HPET_CFG_ENABLE) ) { /* Enable main counter and interrupt generation. */ -- 2.43.0 -- Ngoc Tu Dinh | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates solutions web: https://vates.tech
