With the final linking logic now consolidated in scripts/Makefile.link, $(compare-symbol-tables) also doesn't need setting anymore in Kbuild.include.
Signed-off-by: Jan Beulich <[email protected]> --- v2: New. --- a/xen/scripts/Kbuild.include +++ b/xen/scripts/Kbuild.include @@ -56,19 +56,6 @@ define filechk fi endef -### -# Compare the symbol tables of two object files. As diff's -I option isn't -# standardized, the name difference of the two object files needs abstracting -# out. -define compare-symbol-tables - ln -f $(1) $(@D)/.cst.$$$$; \ - $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym; \ - ln -f $(2) $(@D)/.cst.$$$$; \ - $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(2).sym; \ - rm -f $(@D)/.cst.$$$$; \ - diff -u $(1).sym $(2).sym -endef - # as-insn: Check whether assembler supports an instruction. # Usage: cflags-y += $(call as-insn,CC FLAGS,"insn",option-yes,option-no) as-insn = $(if $(shell echo 'void _(void) { asm volatile ( $(2) ); }' \ --- a/xen/scripts/Makefile.link +++ b/xen/scripts/Makefile.link @@ -33,6 +33,18 @@ final-image-check-y ?= true $(if $(filter $(LAST_LINKING_PASS),$*), $(syms-warn-dup-y)) \ > $@ +# Compare the symbol tables of two object files. As diff's -I option isn't +# standardized, the name difference of the two object files needs abstracting +# out. +define compare-symbol-tables + ln -f $(1) $(@D)/.cst.$$$$; \ + $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym; \ + ln -f $(2) $(@D)/.cst.$$$$; \ + $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(2).sym; \ + rm -f $(@D)/.cst.$$$$; \ + diff -u $(1).sym $(2).sym +endef + .$(TARGET)-syms.%: $(objtree)/prelink.o .$(TARGET)-syms.%.o $(obj)/xen.lds $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $(filter %.o,$^) \ $(build_id_linker) --strip-debug -o $@
