On 17/10/18 10:39, Alexandru Stefan ISAILA wrote:
> This patch adds a couple of regs to the vm_event that are used by
> the introspection. The base, limit and ar
> bits are compressed into a uint64_t union so as not to enlarge the
> vm_event.
>
> Signed-off-by: Alexandru Isaila <aisa...@bitdefender.com>
>
> ---
> Changes since V1:
> - Add helper function for packing
> - Change packing logic
> - Add sel to x86_selector_reg.
> ---
> xen/arch/x86/vm_event.c | 30 ++++++++++++++++++++++--------
> xen/include/public/vm_event.h | 26 ++++++++++++++++++++++----
> 2 files changed, 44 insertions(+), 12 deletions(-)
>
> diff --git a/xen/arch/x86/vm_event.c b/xen/arch/x86/vm_event.c
> index 15de43c3e6..3a29441c84 100644
> --- a/xen/arch/x86/vm_event.c
> +++ b/xen/arch/x86/vm_event.c
> @@ -122,11 +122,25 @@ void vm_event_monitor_next_interrupt(struct vcpu *v)
> v->arch.monitor.next_interrupt_enabled = true;
> }
>
> +static void vm_event_pack_segment_register(enum x86_segment segment,
> + struct x86_selector_reg *reg)
> +{
> + struct segment_register seg;
> +
> + hvm_get_segment_register(current, segment, &seg);
> + reg->fields.base = seg.base;
> + if ( seg.g )
> + reg->fields.limit = seg.limit >> 12;
> + else
> + reg->fields.limit = seg.limit;
I know I suggested this, but how about
reg->fields.limit = seg.g ? seg.limit >> 12 : seg.limit;
which is rather shorter, and probably easier to read.
> + reg->fields.ar = seg.attr;
> + reg->sel = seg.sel;
> +}
> +
> void vm_event_fill_regs(vm_event_request_t *req)
> {
> #ifdef CONFIG_HVM
> const struct cpu_user_regs *regs = guest_cpu_user_regs();
> - struct segment_register seg;
> struct hvm_hw_cpu ctxt = {};
> struct vcpu *curr = current;
>
> @@ -170,14 +184,14 @@ void vm_event_fill_regs(vm_event_request_t *req)
> req->data.regs.x86.msr_star = ctxt.msr_star;
> req->data.regs.x86.msr_lstar = ctxt.msr_lstar;
>
> - hvm_get_segment_register(curr, x86_seg_fs, &seg);
> - req->data.regs.x86.fs_base = seg.base;
> -
> - hvm_get_segment_register(curr, x86_seg_gs, &seg);
> - req->data.regs.x86.gs_base = seg.base;
> + vm_event_pack_segment_register(x86_seg_fs, &req->data.regs.x86.fs);
> + vm_event_pack_segment_register(x86_seg_gs, &req->data.regs.x86.gs);
> + vm_event_pack_segment_register(x86_seg_cs, &req->data.regs.x86.cs);
> + vm_event_pack_segment_register(x86_seg_ss, &req->data.regs.x86.ss);
> + vm_event_pack_segment_register(x86_seg_ds, &req->data.regs.x86.ds);
> + vm_event_pack_segment_register(x86_seg_es, &req->data.regs.x86.es);
>
> - hvm_get_segment_register(curr, x86_seg_cs, &seg);
> - req->data.regs.x86.cs_arbytes = seg.attr;
> + req->data.regs.x86.shadow_gs = ctxt.shadow_gs;
> #endif
> }
>
> diff --git a/xen/include/public/vm_event.h b/xen/include/public/vm_event.h
> index 36e3f4685d..705e6f8a1c 100644
> --- a/xen/include/public/vm_event.h
> +++ b/xen/include/public/vm_event.h
> @@ -29,7 +29,7 @@
>
> #include "xen.h"
>
> -#define VM_EVENT_INTERFACE_VERSION 0x00000003
> +#define VM_EVENT_INTERFACE_VERSION 0x00000004
>
> #if defined(__XEN__) || defined(__XEN_TOOLS__)
>
> @@ -157,6 +157,20 @@
> #define VM_EVENT_X86_CR4 2
> #define VM_EVENT_X86_XCR0 3
>
> +struct __attribute__((__packed__)) x86_selector_reg {
This is a poor choice of name, because you are mixing two different
pieces of information.
sel is a selector value, whereas the union is a segment descriptor
(architecturally speaking).
> + uint16_t sel;
> + union
> + {
> + uint64_t bytes;
> + struct
> + {
> + uint64_t base : 32;
Better known as... ?
> + uint64_t limit : 20;
> + uint64_t ar : 12;
> + } fields;
> + };
> +};
> +
> /*
> * Using custom vCPU structs (i.e. not hvm_hw_cpu) for both x86 and ARM
> * so as to not fill the vm_event ring buffer too quickly.
> @@ -191,9 +205,13 @@ struct vm_event_regs_x86 {
> uint64_t msr_efer;
> uint64_t msr_star;
> uint64_t msr_lstar;
> - uint64_t fs_base;
> - uint64_t gs_base;
What's happened with fs_base and gs_base? You've replaced them with
uint32_t's in x86_selector_reg, but they are 64bit fields in Long mode.
~Andrew
> - uint32_t cs_arbytes;
> + struct x86_selector_reg cs;
> + struct x86_selector_reg ss;
> + struct x86_selector_reg ds;
> + struct x86_selector_reg es;
> + struct x86_selector_reg fs;
> + struct x86_selector_reg gs;
> + uint64_t shadow_gs;
> uint32_t _pad;
> };
>
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