On 25/09/2018 14:27, Jan Beulich wrote: > Fix an inverted pair of checks, drop an incorrect instance of #UD > raising for non-64-bit mode, and add further generic checks. > > Note: Other than SDM Vol 2 rev 067 states, EVEX.V' is _not_ ignored
"Despite what SDM ..." would be a more normal way of phrasing this, I think. > outside of 64-bit mode when the field does not encode a register. > Just like EVEX.VVVV is required to be 0b1111 in that case, EVEX.V' > is required to be 1 there. > > Also rename the bcst field to br, as #UD generation for individual insns > will need to consider both of its possible meanings. > > Signed-off-by: Jan Beulich <[email protected]> Acked-by: Andrew Cooper <[email protected]> I still don't like how hard it is to compare the code to the manual, but given no plausible solution, I'm not sure what to do. ~Andrew _______________________________________________ Xen-devel mailing list [email protected] https://lists.xenproject.org/mailman/listinfo/xen-devel
