On Wed, Nov 28, 2018 at 09:55:59AM +0000, Paul Durrant wrote: > The page merging logic makes use of bits 1-8 and bit 63 of a PTE, which > used to be specified as 'ignored'. However, bits 5 and 6 are now specified > as 'accessed' and 'dirty' bits and their use only remains safe as long as > the DTE 'Host Access Dirty' bits remain unused by Xen, or by hardware > before the domain starts running. (XSA-275 disabled the operation of the > code after domain creation completes). > > With the page merging logic present in its current form there are no spare > ignored bits in the PTE at all, but PV-IOMMU support will require at least > one spare bit to track which PTEs are added by hypercall. > > This patch removes the code, freeing up the remaining PTE ignored bits > for other use, including PV-IOMMU support, as well as significantly > simplifying and shortening the source by ~170 lines. There may be some > marginal performance cost (but none has been observed in manual testing > with a passed-through NVIDIA GPU) since higher order mappings will now be > ruled out until a mapping order parameter is passed to iommu_ops. That will > be dealt with by a subsequent patch though. > > Signed-off-by: Paul Durrant <paul.durr...@citrix.com>
Acked-by: Brian Woods <brian.wo...@amd.com> -- Brian Woods _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
