>>> On 11.03.19 at 12:39, <[email protected]> wrote:
> Ok, thanks for the clarification. So, the problem is that memory accesses 
> are not stashed (understandably I guess) in the mmio_cache. If they were then 
> forcing the code down the MMIO path would work. So, what we probably need is 
> a cache of all accesses that an instruction has made to date, regardless of 
> whether they hit RAM or I/O emulation.

Right, and that's the plan I have anyway when reworking my series
"x86/HVM: implement memory read caching" hopefully more to
Andrew's liking. But this is going to take some time, and hence the
hope was to have some short term fix addressing at least the specific
p2m_ioreq_server issue at hand.

Jan



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