>>> On 30.04.19 at 12:44, <jgr...@suse.com> wrote:
> An alternative would be memory barriers between the writes on ARM,
> right? Or a strong ordered set_bit() variant (we had that discussion
> recently related to a barrier in ARM-specific __cpu_disable()).

Yes.

> Then we could drop this #ifndef section.

Not sure about this - I'm actually unconvinced the latter part of
what's inside the #ifdef isn't actually needed on x86 as well. Just
consider the case of vcpu_unblock() making it to the vcpu_wake()
invocation on another CPU while we're between any two of the
three writes here. (I know I've been feeling uneasy about this
before, but I guess I must have come to the conclusion that it's
_probably_ okay.)

Jan



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