Hello Julien,
On 22.04.19 19:49, Julien Grall wrote:
The page-table walker is configured to use the same shareability and
cacheability as the access performed when updating the page-tables. This
means cleaning the cache for CPU0 domheap is unnecessary.
Furthermore, CPU0 page-tables are part of Xen binary and will already be
zeroed beforehand.
IMO it is a bit confusing.
As I understand, `cpu0_dommap` resides in BSS which is not a part of the binary
unlike initialized data. Yet it is unconditionally cleared during the boot on
ARM32.
So it is pointless to zero the domheap again.
Signed-off-by: Julien Grall <julien.gr...@arm.com>
---
Though:
Reviewed-by: Andrii Anisov <andrii_ani...@epam.com>
--
Sincerely,
Andrii Anisov.
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