Hi,

Sorry for the formatting.

On Sat, 9 Nov 2019, 04:27 Stefano Stabellini, <sstabell...@kernel.org>
wrote:

> On Thu, 7 Nov 2019, Peng Fan wrote:
> > The end should be GICD_ISACTIVERN not GICD_ISACTIVER.
> >
> > Signed-off-by: Peng Fan <peng....@nxp.com>
>
> Reviewed-by: Stefano Stabellini <sstabell...@kernel.org>
>

To be honest, I am not sure the code is correct. A read to those registers
should tell you the list of interrupts active. As we always return 0, this
will not return the correct state of the GIC.

I know that returning the list of actives interrupts is complicated with
the old vGIC, but I don't think silently ignoring it is a good idea.

The question here is why the guest accessed those registers? What is it
trying to figure out?



> Juergen, I think this fix should be in the release (and also
> backported to stable trees.)
>

Without an understanding of the problem, I disagree with this request (see
above).

As an aside, the range ISPENDR  has the same issue.

Cheers,




>
>
> > ---
> >  xen/arch/arm/vgic-v3.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> > index 422b94f902..e802f2055a 100644
> > --- a/xen/arch/arm/vgic-v3.c
> > +++ b/xen/arch/arm/vgic-v3.c
> > @@ -706,7 +706,7 @@ static int __vgic_v3_distr_common_mmio_read(const
> char *name, struct vcpu *v,
> >          goto read_as_zero;
> >
> >      /* Read the active status of an IRQ via GICD/GICR is not supported
> */
> > -    case VRANGE32(GICD_ISACTIVER, GICD_ISACTIVER):
> > +    case VRANGE32(GICD_ISACTIVER, GICD_ISACTIVERN):
> >      case VRANGE32(GICD_ICACTIVER, GICD_ICACTIVERN):
> >          goto read_as_zero;
> >
> > --
> > 2.16.4
> >
>
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