On 27.11.19 16:48, Roger Pau Monne wrote:
When using posted interrupts on Intel hardware it's possible that the
vCPU resumes execution with a stale local APIC IRR register because
depending on the interrupts to be injected vlapic_has_pending_irq
might not be called, and thus PIR won't be synced into IRR.
Fix this by making sure PIR is always synced to IRR in
hvm_vcpu_has_pending_irq regardless of what interrupts are pending.
Reported-by: Joe Jin <joe....@oracle.com>
Signed-off-by: Roger Pau Monné <roger....@citrix.com>
Release-acked-by: Juergen Gross <jgr...@suse.com>
Juergen
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