On 03.12.2019 06:41, Marek Marczykowski-Górecki  wrote:
> @@ -117,6 +118,35 @@ static int command_write(struct pci_dev *dev, int 
> offset, u16 value, void *data)
>               pci_clear_mwi(dev);
>       }
>  
> +     if (dev_data && dev_data->allow_interrupt_control) {
> +             if (!(cmd->val & PCI_COMMAND_INTX_DISABLE) &&
> +                 (value & PCI_COMMAND_INTX_DISABLE)) {
> +                     pci_intx(dev, 0);
> +             } else if ((cmd->val & PCI_COMMAND_INTX_DISABLE) &&
> +                 !(value & PCI_COMMAND_INTX_DISABLE)) {
> +                     /* Do not allow enabling INTx together with MSI or 
> MSI-X. */
> +                     /* Do not trust dev->msi(x)_enabled here, as enabling 
> could be done
> +                      * bypassing the pci_*msi* functions, by the qemu.
> +                      */
> +                     err = pci_read_config_word(dev,
> +                                                dev->msi_cap + PCI_MSI_FLAGS,
> +                                                &cap_value);
> +                     if (!err && (cap_value & PCI_MSI_FLAGS_ENABLE))
> +                             err = -EBUSY;
> +                     if (!err)
> +                             err = pci_read_config_word(dev,
> +                                                        dev->msix_cap + 
> PCI_MSIX_FLAGS,
> +                                                        &cap_value);

What about a device without MSI and/or MSI-X? Wouldn't you read
from (close to) config space offset 0 in this case, interpreting
some unrelated bit(s) as the MSI / MSI-X enable one(s)?

Just as an initial implementation related remark. I'm still to
think about the idea as a whole, albeit I find the argument
pretty convincing at the first glance of devices being able to
raise MSI anyway even when disabled as per the config space
setting. (Of course, as with any config space settings, devices
providing backdoor access would open similar avenues.)

Jan

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