AMD and friends explicitly specify that 64-bit operands aren't possible for these insns. Nevertheless REX.W isn't fully ignored: It still cancels a possible operand size override (0x66). Intel otoh explicitly provides for 64-bit operands on the respective insn page of the SDM.
Signed-off-by: Jan Beulich <[email protected]> --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -2640,6 +2640,15 @@ x86_decode_twobyte( } break; + case 0xb2: /* lss */ + case 0xb4: /* lfs */ + case 0xb5: /* lgs */ + /* REX.W ignored on a vendor-dependent basis. */ + if ( op_bytes == 8 && + (ctxt->cpuid->x86_vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) + op_bytes = 4; + break; + case 0xb8: /* jmpe / popcnt */ if ( rep_prefix() ) ctxt->opcode |= MASK_INSR(vex.pfx, X86EMUL_OPC_PFX_MASK); _______________________________________________ Xen-devel mailing list [email protected] https://lists.xenproject.org/mailman/listinfo/xen-devel
