Hi Jan,
On 14/01/2020 10:23, Jan Beulich wrote:
On 14.01.2020 11:16, Julien Grall wrote:
Hi Jan,
On 14/01/2020 10:02, Jan Beulich wrote:
FIFO event channels allow ports up to 2^17, so we need to use a wider
field in struct pirq. Move "masked" such that it may share the 8-byte
slot with struct arch_pirq on 64-bit arches, rather than leaving a
7-byte hole in all cases.
Take the opportunity and also add a comment regarding "arch" placement
within the structure.
Signed-off-by: Jan Beulich <jbeul...@suse.com>
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -127,9 +127,10 @@ struct vcpu;
struct pirq {
int pirq;
- u16 evtchn;
- bool_t masked;
+ evtchn_port_t evtchn;
struct rcu_head rcu_head;
+ bool masked;
+ /* Architectures may require this field to be last. */
I orginally planned to add a comment in struct pirq, but I am not in
favor to continue to encourage quirkiness in the code. I sent a series
(see [1]) that drop this requirements from x86 and therefore remove the
need of this comment.
Well, I've found the issue fixed here while doing a first review pass
over said patch of yours (I'm yet to make up my mind whether I have
reservations, hence I didn't reply yet). The change here will want
backporting, so it'll be easier in any event to rebase your patch over
this one. This rebasing can then include dropping the comment again.
Fair enough.
Cheers,
--
Julien Grall
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