From: Tony Luck <[email protected]> New CPU model, same MSRs to control and read the inventory number.
Signed-off-by: Tony Luck <[email protected]> [Linux commit dc6b025de95bcd22ff37c4fabb022ec8a027abf1] Signed-off-by: Jan Beulich <[email protected]> --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -871,6 +871,7 @@ static void intel_init_ppin(const struct case 0x55: /* Skylake X */ case 0x56: /* Broadwell Xeon D */ case 0x57: /* Knights Landing */ + case 0x6a: /* Icelake X */ case 0x85: /* Knights Mill */ if ( (c != &boot_cpu_data && !ppin_msr) || _______________________________________________ Xen-devel mailing list [email protected] https://lists.xenproject.org/mailman/listinfo/xen-devel
