> -----Original Message----- > From: Xen-devel <xen-devel-boun...@lists.xenproject.org> On Behalf Of Jan > Beulich > Sent: 03 March 2020 10:19 > To: xen-devel@lists.xenproject.org > Cc: Andrew Cooper <andrew.coop...@citrix.com>; Roger Pau Monné > <roger....@citrix.com>; Tim Deegan > <t...@xen.org>; Wei Liu <w...@xen.org>; Paul Durrant <p...@xen.org> > Subject: [EXTERNAL][Xen-devel] [PATCH v5 3/4] x86/mm: use cache in > guest_walk_tables() > > CAUTION: This email originated from outside of the organization. Do not click > links or open > attachments unless you can confirm the sender and know the content is safe. > > > > Emulation requiring device model assistance uses a form of instruction > re-execution, assuming that the second (and any further) pass takes > exactly the same path. This is a valid assumption as far as use of CPU > registers goes (as those can't change without any other instruction > executing in between [1]), but is wrong for memory accesses. In > particular it has been observed that Windows might page out buffers > underneath an instruction currently under emulation (hitting between two > passes). If the first pass translated a linear address successfully, any > subsequent pass needs to do so too, yielding the exact same translation. > To guarantee this, leverage the caching that now backs HVM insn > emulation. > > [1] Other than on actual hardware, actions like > XEN_DOMCTL_sethvmcontext, XEN_DOMCTL_setvcpucontext, > VCPUOP_initialise, INIT, or SIPI issued against the vCPU can occur > while the vCPU is blocked waiting for a device model to return data. > In such cases emulation now gets canceled, though, and hence re- > execution correctness is unaffected. > > Signed-off-by: Jan Beulich <jbeul...@suse.com>
Reviewed-by: Paul Durrant <pdurr...@amzn.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
