Le lun. 20 juil. 2020 à 09:00, Roger Pau Monné <[email protected]> a écrit : > You need to set entry_nr and table_base.
Yes, I do that. I use the table_base set to what would be written to the register for "native". > Are you enabling the capability and unmasking the interrupt in the > MSI-X table? Yes, I'm doing that. > There are also the Xen debug keys which can be helpful, take a look at > 'i' and 'M'. OK, I'll check that. Le lun. 20 juil. 2020 à 10:47, Jan Beulich <[email protected]> a écrit : > Is this effort for PV or PVH? If the former, I don't think Dom0 is > supposed to write directly to any of these structures. This is all > intended to be hypercall based, despite us intercepting and trying > to emulate direct accesses. > > Jaromír - are you making use of PHYSDEVOP_prepare_msix? It's PV for now. I already skip the step to actually write the table vectors when setting this up, same as I do for MSI. I still write the registers to enable MSI-X. I was not aware of PHYSDEVOP_prepare_msix, I did not notice it when looking on what Linux kernel does - I'll check it. Thanks. Jaromir
