> On 26 Aug 2020, at 08:46, Bertrand Marquis <bertrand.marq...@arm.com> wrote:
> 
> 
> 
>> On 25 Aug 2020, at 18:42, Julien Grall <jul...@xen.org> wrote:
>> 
>> From: Julien Grall <jgr...@amazon.com>
>> 
>> Commit 858c0be8c2fa "xen/arm: Enable CPU Erratum 1165522 for Neoverse"
>> added a new erratum but forgot to update silicon-errata.txt.
>> 
>> Update the file accordingly to keep track of errata workaround in Xen.
> 
> Oh i should have done that as part of my patch.
> Nice catch.
> 
>> 
>> Signed-off-by: Julien Grall <jgr...@amazon.com>
>> Cc: Bertrand Marquis <bertrand.marq...@arm.com>
>> ---
>> docs/misc/arm/silicon-errata.txt | 1 +
>> 1 file changed, 1 insertion(+)
>> 
>> diff --git a/docs/misc/arm/silicon-errata.txt 
>> b/docs/misc/arm/silicon-errata.txt
>> index 11e5a9dcec2c..ee070e723a5f 100644
>> --- a/docs/misc/arm/silicon-errata.txt
>> +++ b/docs/misc/arm/silicon-errata.txt
>> @@ -51,4 +51,5 @@ stable hypervisors.
>> | ARM            | Cortex-A57      | #1319537        | N/A                   
>>   |
>> | ARM            | Cortex-A72      | #1319367        | N/A                   
>>   |
>> | ARM            | Cortex-A76      | #1165522        | N/A                   
>>   |
>> +| ARM            | Neoverse        | #1165522        | N/A
> 
> Should be Neoverse-N1 here (E1 for example is not impacted by this errata)
> 
> Cheers
> Bertrand
> 
>> | ARM            | MMU-500         | #842869         | N/A                   
>>   |
>> --
>> 2.17.1
>> 
> 
> IMPORTANT NOTICE: The contents of this email and any attachments are 
> confidential and may also be privileged. If you are not the intended 
> recipient, please notify the sender immediately and do not disclose the 
> contents to any other person, use it for any purpose, or store or copy the 
> information in any medium. Thank you.

Sorry forgot to remove the disclaimer (again).

Bertrand


Reply via email to