# HG changeset patch
# User Hollis Blanchard <[EMAIL PROTECTED]>
# Node ID e58d85332e0cc2a4696eb14a6adbc9086d427573
# Parent  769ff9efeca25711f0fcc568caa125c1df3d114e
[XEN][POWERPC] restructure RMA code to allow dom0 tools to allocate in the 
future
Signed-off-by: Hollis Blanchard <[EMAIL PROTECTED]>
---
 xen/arch/powerpc/boot_of.c          |    2 -
 xen/arch/powerpc/domain.c           |    2 -
 xen/arch/powerpc/powerpc64/ppc970.c |   66 ++++++++++++++++++------------------
 xen/arch/powerpc/setup.c            |    2 -
 xen/include/asm-powerpc/processor.h |    2 -
 5 files changed, 37 insertions(+), 37 deletions(-)

diff -r 769ff9efeca2 -r e58d85332e0c xen/arch/powerpc/boot_of.c
--- a/xen/arch/powerpc/boot_of.c        Fri Aug 25 15:28:48 2006 -0400
+++ b/xen/arch/powerpc/boot_of.c        Fri Aug 25 14:48:07 2006 -0500
@@ -727,7 +727,7 @@ static ulong find_space(u32 size, u32 al
                     __func__, space_base, eomem, size, align);
     base = ALIGN_UP(space_base, PAGE_SIZE);
 
-    while ((base + size) < rma_size(cpu_rma_order())) {
+    while ((base + size) < rma_size(cpu_default_rma_order_pages())) {
         if (of_claim(base, size, 0) != OF_FAILURE) {
             space_base = base + size;
             return base;
diff -r 769ff9efeca2 -r e58d85332e0c xen/arch/powerpc/domain.c
--- a/xen/arch/powerpc/domain.c Fri Aug 25 15:28:48 2006 -0400
+++ b/xen/arch/powerpc/domain.c Fri Aug 25 14:48:07 2006 -0500
@@ -86,7 +86,7 @@ int arch_domain_create(struct domain *d)
         return 0;
     }
 
-    d->arch.rma_order = cpu_rma_order();
+    d->arch.rma_order = cpu_default_rma_order_pages();
     rma_sz = rma_size(d->arch.rma_order);
 
     /* allocate the real mode area */
diff -r 769ff9efeca2 -r e58d85332e0c xen/arch/powerpc/powerpc64/ppc970.c
--- a/xen/arch/powerpc/powerpc64/ppc970.c       Fri Aug 25 15:28:48 2006 -0400
+++ b/xen/arch/powerpc/powerpc64/ppc970.c       Fri Aug 25 14:48:07 2006 -0500
@@ -34,11 +34,34 @@
 
 extern volatile struct processor_area * volatile global_cpu_table[];
 
-unsigned int cpu_rma_order(void)
+struct rma_settings {
+    int order;
+    int rmlr0;
+    int rmlr12;
+};
+
+static struct rma_settings rma_orders[] = {
+    { .order = 26, .rmlr0 = 0, .rmlr12 = 3, }, /*  64 MB */
+    { .order = 27, .rmlr0 = 1, .rmlr12 = 3, }, /* 128 MB */
+    { .order = 28, .rmlr0 = 1, .rmlr12 = 0, }, /* 256 MB */
+    { .order = 30, .rmlr0 = 0, .rmlr12 = 2, }, /*   1 GB */
+    { .order = 34, .rmlr0 = 0, .rmlr12 = 1, }, /*  16 GB */
+    { .order = 38, .rmlr0 = 0, .rmlr12 = 0, }, /* 256 GB */
+};
+
+static struct rma_settings *cpu_find_rma(unsigned int order)
 {
-    /* XXX what about non-HV mode? */
-    uint rma_log_size = 6 + 20; /* (1 << 6) == 64 */
-    return rma_log_size - PAGE_SHIFT;
+    int i;
+    for (i = 0; i < ARRAY_SIZE(rma_orders); i++) {
+        if (rma_orders[i].order == order)
+            return &rma_orders[i];
+    }
+    return NULL;
+}
+
+unsigned int cpu_default_rma_order_pages(void)
+{
+    return rma_orders[0].order - PAGE_SHIFT;
 }
 
 unsigned int cpu_large_page_orders(uint *sizes, uint max)
@@ -129,45 +152,22 @@ void cpu_init_vcpu(struct vcpu *v)
 {
     struct domain *d = v->domain;
     union hid4 hid4;
-    ulong rma_base = page_to_maddr(d->arch.rma_page);
-    ulong rma_size = rma_size(d->arch.rma_order);
+    struct rma_settings *rma_settings;
 
     hid4.word = mfhid4();
 
     hid4.bits.lpes0 = 0; /* exceptions set MSR_HV=1 */
     hid4.bits.lpes1 = 1; /* RMA applies */
 
-    hid4.bits.rmor = rma_base >> 26;
+    hid4.bits.rmor = page_to_maddr(d->arch.rma_page) >> 26;
 
     hid4.bits.lpid01 = d->domain_id & 3;
     hid4.bits.lpid25 = (d->domain_id >> 2) & 0xf;
 
-    switch (rma_size) {
-        case 256ULL << 30:  /* 256 GB */
-            hid4.bits.rmlr0 = 0;
-            hid4.bits.rmlr12 = 0;
-            break;
-        case 16ULL << 30:   /* 16 GB */
-            hid4.bits.rmlr0 = 0;
-            hid4.bits.rmlr12 = 1;
-            break;
-        case 1ULL << 30:    /* 1 GB */
-            hid4.bits.rmlr0 = 0;
-            hid4.bits.rmlr12 = 2;
-            break;
-        case 64ULL << 20:   /* 64 MB */
-            hid4.bits.rmlr0 = 0;
-            hid4.bits.rmlr12 = 3;
-            break;
-        case 256ULL << 20:  /* 256 MB */
-            hid4.bits.rmlr0 = 1;
-            hid4.bits.rmlr12 = 0;
-            break;
-        case 128ULL << 20:  /* 128 MB */
-            hid4.bits.rmlr0 = 1;
-            hid4.bits.rmlr12 = 3;
-            break;
-    }
+    rma_settings = cpu_find_rma(d->arch.rma_order + PAGE_SHIFT);
+    ASSERT(rma_settings != NULL);
+    hid4.bits.rmlr0 = rma_settings->rmlr0;
+    hid4.bits.rmlr12 = rma_settings->rmlr12;
 
     v->arch.cpu.hid4.word = hid4.word;
 }
diff -r 769ff9efeca2 -r e58d85332e0c xen/arch/powerpc/setup.c
--- a/xen/arch/powerpc/setup.c  Fri Aug 25 15:28:48 2006 -0400
+++ b/xen/arch/powerpc/setup.c  Fri Aug 25 14:48:07 2006 -0500
@@ -297,7 +297,7 @@ static void __init __start_xen(multiboot
 #endif
 
     /* we give the first RMA to the hypervisor */
-    xenheap_phys_end = rma_size(cpu_rma_order());
+    xenheap_phys_end = rma_size(cpu_default_rma_order_pages());
 
     /* Check that we have at least one Multiboot module. */
     if (!(mbi->flags & MBI_MODULES) || (mbi->mods_count == 0)) {
diff -r 769ff9efeca2 -r e58d85332e0c xen/include/asm-powerpc/processor.h
--- a/xen/include/asm-powerpc/processor.h       Fri Aug 25 15:28:48 2006 -0400
+++ b/xen/include/asm-powerpc/processor.h       Fri Aug 25 14:48:07 2006 -0500
@@ -40,7 +40,7 @@ extern void show_registers(struct cpu_us
 extern void show_registers(struct cpu_user_regs *);
 extern void show_execution_state(struct cpu_user_regs *);
 extern void show_backtrace(ulong sp, ulong lr, ulong pc);
-extern uint cpu_rma_order(void);
+extern unsigned int cpu_default_rma_order_pages(void);
 extern uint cpu_large_page_orders(uint *sizes, uint max);
 extern void cpu_initialize(int cpuid);
 extern void cpu_init_vcpu(struct vcpu *);

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