On Sep 1, 2006, at 4:07 PM, Segher Boessenkool wrote:

[POWERPC][XEN] Erratum: Must clear larx/stcx reservation on exception

PowerPC 970 Erratum that an "OS should execute a stcx in
the interrupt handler to clear the reservation."

Where do you see this erratum?  I can't find it in any 970
errata sheet.  Furthermore, it's not a CPU bug at all; every
PowerPC on the planet works this way, it's part of the
architecture.  See the "Interrupt Processing" chapter in Book III.

     stw r0, UREGS_cr(r1)            /* save CR */
     mfspr r0, SPRN_HSPRG1
     std r0, UREGS_r13(r1)           /* save R13 from HSPRG1 */
+
+ /* Blow away any reservation according to 970 errata after saving CR */
+    stdcx. r1, 0, r1

I hope it's okay to blow away not only the reservation, but also
the data that's at the memory address in GPR1, because there's
nothing preventing this store-conditional from succeeding AFAICS
(if the CPU happens to have a reservation there -- yeah quite
unlikely, but is it impossible?)

Oh jeez, big DUH on me.
I wanted a store of no consequence, this ain;t it.. prolly won't hurt but I'll fix as soon as I can.
-JX




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