On Tue, Sep 12, 2006 at 06:00:17PM +0200, Segher Boessenkool wrote:
> >Sometimes when Xen is booted and we let Linux init the MPIC for  
> >"the second time" Xen could end up in a loop where the CPU is  
> >constantly being interrupted by the MPIC.
> >
> >Because of console buffering, the last message you see is some  
> >message from early kernel boot.
> >Anyway.. we detect this now and you see a panic.
> There seems to be a problem with the U3/U4 MPIC, where edge-
> triggered interrupts are delivered to more than one CPU.  Every
> CPU other than the one that ACKed it first, will get the spurious
> vector (so functionally, the impact of this bug isn't that bad;
> performance-wise it might be different).
> The UART IRQ [on JS2x and Maple] is an edge IRQ; if you produce
> console output for every spurious interrupt, you'll get a nice
> little storm.  Is that what's happening?
> >Yes, I believe, it has something to do with temperature.
> Interesting observation, never thought of investigating that --
> it's in line with my suspicion that something in the MPIC is
> metastable though.

I don't know if this is realted or something else but I just got:
*** 0000 : Setup Done
[boot]0015 Setup Done
Built 1 zonelists.  Total pages: 49152
Kernel command line: root=/dev/hda3 ro sysrq=1
Sharing PIC with Xen -> maple_init_IRQ
<6>mpic: Setting up MPIC "U3-MPIC" version 1.2 at f8040000, max 4 CPUs
mpic: ISU size: 124, shift: 7, mask: 7f
mpic: Initializing for 124 sources
mpic: Setting up HT PICs workarounds for U3/U4
mpic:   - HT:01.0 [0xb8] vendor 1022 device 7450 has 4 irqs
mpic:   - HT:02.0 [0xb8] vendor 1022 device 7450 has 4 irqs
mpic:   - HT:03.0 [0xf0] vendor 1022 device 7460 has 24 irqs
(XEN) ****************************************
(XEN) Panic on CPU 0:
(XEN) Too many (100) spurrious interrupts in a row
(XEN)   Known problem, please halt and let machine idle/cool   then reboot
(XEN) ****************************************
(XEN) Reboot in five seconds...

on my JS20, rebooting cleared the error.

Yours Tony

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