On Sep 27, 2006, at 8:37 AM, Segher Boessenkool wrote:

If you need inv_all here, you have a bug elsewhere...

I agree, I'm just trying to corner the beast :)

Ok, this seems to work, its pretty solid, so somehow our invalidation logic is sufficient for network but not disk activity. One theory is that disk uses short lived TCE entries and not batching as network does.

So we have a workaround and later we can investigate the single entry issue.

Do you map the DART table as M=1 or M=0?  U3 should use M=0
(and needs logic to flush the data to main memory), while U4
should use M=1...

We are running in real-mode so there is no mapping.
We use normal writes and flush the cache.
After we flush everything we then go after the IO regs to invalidate, that syncs the hell out of the processor.

I'm considering using our CI IO ops to update the DART table just to see if it makes a diff.

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