I am having some doubts about this code in external.c:

    vec = xen_mpic_get_irq(regs);
    if (vec != -1) {
        ...
        spur_count = 0;
    } else {
        ++spur_count;
        if (spur_count > 100)
            panic("Too many (%d) spurrious interrupts in a row\n");
    }

When I do this:

--- a/xen/arch/powerpc/external.c       Fri Oct 06 12:15:06 2006 -0500
+++ b/xen/arch/powerpc/external.c       Sat Oct 07 00:35:01 2006 -0400
@@ -84,6 +84,7 @@ void do_external(struct cpu_user_regs *r
 
     if (vec != -1) {
         DBG("EE:0x%lx isrc: %d\n", regs->msr, vec);
+        BUG();
         regs->entry_vector = vec;
         do_IRQ(regs);

I make it all the way to here in dom0 Linux before the BUG asserts:

ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
AMD8111: IDE controller at PCI slot 0000:00:04.1
AMD8111: chipset revision 3
AMD8111: 0000:00:04.1 (rev 03) UDMA133 controller
AMD8111: 100% native mode on irq 16
    ide0: BM-DMA at 0x8020-0x8027, BIOS settings: hda:pio, hdb:pio
    ide1: BM-DMA at 0x8028-0x802f, BIOS settings: hdc:pio, hdd:pio
hda: FUJITSU MHT2040AS, ATA DISK drive
ide0 at 0x8000-0x8007,0x800a on irq 16
hda: max request size: 128KiB
(XEN) BUG at external.c:87

The code of concern seems well suited to catch a spurious interrupt
storm, since when a valid external interrupt is recieved, the counter is
reset.  But given that we don't take our first external until way into
dom0's boot, we are actually asserting that 100 spurious interrupts
won't be received over a fairly long period of time.

I can't find any documents regarding expected spurious interrupt rates.
Can anyone with knowledge in this area comment about the code of concern?


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