On Nov 9, 2006, at 4:35 PM, Amos Waterland wrote:
Flush the ERAT very early on secondary processors.
Because Jimi has expressed skepticism about the need to do this, we
provide the following empirical and statistical arguments.
I have personally experienced this issue myself, since using the
patch I have _not_.
I'm excepting the patch as a "FW workaround" and simply as yet
another thing we need to reset on the chip.
Having said that, and the evidence of experienced stability, I would
like to explore the possibility that this is indeed some ERAT
I don't know enough about Low Level FW (LLFW) not the POR cycle on
the secondary processors, but I'd like to know more :) any insight
Xen-ppc-devel mailing list