Do not set the NAP and DPM bits in HID0 until we have had a chance to
audit the safe halt and idle loop code.  Not setting these bits allows
the model 884241X JS20 blade in TRL to boot correctly, and possibly also
the Maple in YKT.  Thanks to Jimi for his help in this matter.

Signed-off-by: Amos Waterland <[EMAIL PROTECTED]>

---

 ppc970.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff -r 927f25df5154 xen/arch/powerpc/powerpc64/ppc970.c
--- a/xen/arch/powerpc/powerpc64/ppc970.c       Thu Nov 30 16:21:22 2006 -0500
+++ b/xen/arch/powerpc/powerpc64/ppc970.c       Fri Dec 01 16:24:32 2006 -0500
@@ -193,8 +193,8 @@ void cpu_initialize(int cpuid)
     mtdec(timebase_freq);
     mthdec(timebase_freq);
 
-    hid0.bits.nap = 1;      /* NAP */
-    hid0.bits.dpm = 1;      /* Dynamic Power Management */
+    hid0.bits.nap = 0;      /* NAP */
+    hid0.bits.dpm = 0;      /* Dynamic Power Management */
     hid0.bits.nhr = 1;      /* Not Hard Reset */
     hid0.bits.hdice_en = 1; /* enable HDEC */
     hid0.bits.en_therm = 0; /* ! Enable ext thermal ints */

_______________________________________________
Xen-ppc-devel mailing list
Xen-ppc-devel@lists.xensource.com
http://lists.xensource.com/xen-ppc-devel

Reply via email to