On Dec 1, 2006, at 6:02 PM, Segher Boessenkool wrote:
Do not set the NAP and DPM bits in HID0 until we have had a chance to
audit the safe halt and idle loop code. Not setting these bits
the model 884241X JS20 blade in TRL to boot correctly, and
the Maple in YKT. Thanks to Jimi for his help in this matter.
Is the DPM change required? I never saw any problems
here... NAP and other power saving modes can cause
problems for sure (for example, on pre-970MP 970s, some
power saving modes require flushing the L2 before entering
that mode, etc.)
Most JS20 and JS21 have DPM disabled on the board, which is why we
have not seen any SMP problems with them. However the Maple-D and
the JS20 model Amos cites both have had problems with the one of
these two modes. That model seems to be the newest JS20 we've run on.
We'll have to brush up on errata before we enable this one again.
Xen-ppc-devel mailing list