- /* FIXME Do not set the NAP and DPM bits in HID0 until we have had a
-     * chance to audit the safe halt and idle loop code. */
+ /* FIXME Do not set the NAP bit in HID0 until we have had a chance
+     * to audit the safe halt and idle loop code. */
     hid0.bits.nap = 0;      /* NAP */
-    hid0.bits.dpm = 0;      /* Dynamic Power Management */
+    hid0.bits.dpm = 1;      /* Dynamic Power Management */
     hid0.bits.nhr = 1;      /* Not Hard Reset */
     hid0.bits.hdice_en = 1; /* enable HDEC */


This works on the JS20 in TRL.

Great to hear DPM is just fine.  NAP is expected to have
problems on CPUs before 970MP, it needs special setup.


Segher


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