Gilles Chanteperdrix wrote: > Detlef Vollmann wrote: > > It's not so difficult to work around the problem for a single system. > > What's difficult is to find a solution in a framework that wasn't > > built with such a problem in mind. > > Actually, all architectures have a delay below which they can not be > reprogrammed fast enough. This delay is simply 0 for all of them. > > How about rewriting rthal_timer_program_shot as: > > static inline void rthal_timer_program_shot (unsigned long delay) > { > if(delay < __ipipe_mach_min_delay) > rthal_trigger_irq(RTHAL_TIMER_IRQ); > else > __ipipe_mach_set_dec(delay); > } > > And define __ipipe_mach_min_delay to be 8 ticks for the PXA architecture ?
You can even do this in __ipipe_mach_set_dec, this avoid the need to modify I-ipipe non-machine specific code. Something like: void __ipipe_mach_set_dec(unsigned long delay) { if (delay < 8) ipipe_trigger_irq(__ipipe_mach_timerint); else OSMR0 = OSCR + delay; } Supposing that OSSR=OSSR_M0 is done elsewhere. -- Gilles Chanteperdrix. _______________________________________________ Xenomai-core mailing list Xenomai-core@gna.org https://mail.gna.org/listinfo/xenomai-core