On Wed, 2006-08-30 at 15:29 +0200, Jan Kiszka wrote:
> Dmitry Adamushko wrote:
> > On 29/08/06, Jan Kiszka <[EMAIL PROTECTED]> wrote:
> >>
> >> Dmitry Adamushko wrote:
> >>
> >> I think the additional costs of maintaining an error counter are almost
> >> negligible. The test is in the unlikely path, and the first condition
> >> already keeps us away from touching the counter.
> > 
> > 
> > But it's updated (unhandled = 0) any time the ISR(s) report something
> > different from XN_ISR_NONE.  Hence, it's at the beginning of the xnintr_t
> > structure, hopefully, at the same cache line with other highly-used members
> > (i.e. isr, cookie and hits).
> 
> Mmh, considering this and also the existing code I wonder if we could
> optimise this a bit. I'm only looking at xnintr_irq_handler now (sharing
> is slow anyway): currently the intr object is touched both before
> (naturally...) and after the call to the ISR handler. Maybe we can push
> all accesses before the handler for the fast path. E.g.:
> 
> int unhandled = intr->unhandled;
> 
> intr->unhandled = 0;
> ++intr->hits;
> s = intr->isr(...);
> 
> if (s == XN_ISR_NONE) {
>       intr->unhandled = ++unhandled;
>       if (unhandled == XNINTR_MAX_UNHANDLED)
>               ALARM!
> }
> 

Without speculating whether this could actually reduce cache misses or
not when the branch is taken, the main issue I see here is that we would
optimize the error case, at the expense of an additional memory fetching
in the common case, and perhaps one CPU register available less for
processing the normal path in the worst scenario, which would not be
particularly efficient on x86.

> Jan
> 
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-- 
Philippe.



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