Gilles Chanteperdrix wrote: > Sebastian Smolorz wrote: > > Gilles Chanteperdrix wrote: > >>You can avoid this problem by adding LATCH or > >>__ipipe_mach_ticks_per_jiffy to the current value of the match register > >>in the timer interrupt, as it is done for the SA and PXA architectures. > > > > Unfortunately, this solution is not applicable. The timers of PXA and SA > > are counting up whereas the S3C24xx timers are counting down to zero. > > There is no match register for the next interrupt. In contrast, the timer > > must be programmed with the new dec value directly, thus stopping it for > > the time of re-programming. > > Right, you are in the same case as the integrator platform.
Yes. But I cannot adopt the integrator's re-programming of the timer in the Linux timer interrupt handler because this would lead to lost ticks or rather to longer periods. Therefore I proposed the patch. -- Sebastian _______________________________________________ Xenomai-core mailing list Xenomaifirstname.lastname@example.org https://mail.gna.org/listinfo/xenomai-core