Gilles Chanteperdrix wrote: > This patch adds architecture independent support for non cached memory > mappings. This is necessary on ARM architecture with VIVT cache to share a >mapping between kernel and user-space, but may be used in other situations > (who knows).
So, the difference between H_DMA and H_NONCACHED would be that H_NONCACHED may not be physically contiguous, while H_DMA (that is physically contiguous) may still be cached on cache coherent systems. Is that correct? -- Stephane PS: any plan on a H_HUGETLB one of those days? _______________________________________________ Xenomai-core mailing list Xenomaifirstname.lastname@example.org https://mail.gna.org/listinfo/xenomai-core