On Mon, May 5, 2008 at 6:39 PM, Philippe Gerum <[EMAIL PROTECTED]> wrote:
> Gilles Chanteperdrix wrote:
>  > On Sat, May 3, 2008 at 12:34 AM, Gilles Chanteperdrix
>  > <[EMAIL PROTECTED]> wrote:
>  >>  The include/asm-arm/atomic.h header now defines the 
> xnarch_memory_barrier in
>  >>  addition to user-space atomic operations. The pxa3xx deserves a special
>  >>  treatment since it uses the ARMv6 memory barrier operation whereas being 
> an
>  >>  ARMv5 for other operations, hence a special --enable-arm-mach=pxa3xx 
> option in
>  >>  configure.in.
>  >
>  > After a quick look at all architectures xenomai supports, it seems
>  > that we can implement atomic_cmpxchg for most of them in user-space.
>  > The only one for which I have a doubt is blackfin. Since linux for
>  > blackfin is uclinux, can we call cli/sti from user-space ?
>  >
>  Nope, these are supervisor's toys on this arch. IIRC, recent Blackfin 
> releases
>  should be providing fast atomic ops from userland despite this, by using
>  protected jumps to kernel space for that purpose. I need to check that in the
>  kernel code, this was a discussion running on the Blackfin dev-list months 
> ago.

It looks like the same technique as used on pre-v6 ARM.

>  Anyway, I would suggest to exclude Blackfin from the mutex optimization set
>  right now, then go back to it when we support their latest kernel.

Ok. I was dreaming about removing all the #ifdef
XNARCH_HAVE_US_ATOMIC_CMPXCHG. But it is probably better to leave it
after all. If for anything, it will help people doing ports to new
architectures gradually.


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