On 09/18/2011 04:43 PM, Bertold Van den Bergh wrote: > Hello, > > Thanks for the reply. The timer register has the following layout: bit > 0-15: reload, bit 16-31: counter. Thats why I put 0xFFFF0000. Looking > at the code this cannot work so I added an extra field to indicate the > shift after applying the mask. > > Now the userspace latency test prorgam gives valid latencies, sadly > it's still -1ms to 3ms latency. > > How should I proceed troubleshooting this? > Looking at the ipipe trace it looks the task is brought op quite fast > after the interrupt fires so I think it is set at the wrong time, I'm > going to look into this.
Note that you probably have not enabled CONFIG_IPIPE_TRACE_MCOUNT, you should enable it to get more complete traces. -- Gilles. _______________________________________________ Xenomai-core mailing list Xenomaiemail@example.com https://mail.gna.org/listinfo/xenomai-core