Module: xenomai-head
Branch: master
Commit: 6018d1e9a6b2907521455ca4b262c13ebc2fefbd
URL:    
http://git.xenomai.org/?p=xenomai-head.git;a=commit;h=6018d1e9a6b2907521455ca4b262c13ebc2fefbd

Author: Gilles Chanteperdrix <gilles.chanteperd...@xenomai.org>
Date:   Sun Aug  1 19:39:15 2010 +0200

Add IMX51 patch

---

 ksrc/arch/arm/patches/README                       |   12 ++-
 .../patches/ipipe-2.6.31-arm-1.16-02-imx51.patch   |   89 ++++++++++++++++++++
 2 files changed, 97 insertions(+), 4 deletions(-)

diff --git a/ksrc/arch/arm/patches/README b/ksrc/arch/arm/patches/README
index da64e3e..96e51bd 100644
--- a/ksrc/arch/arm/patches/README
+++ b/ksrc/arch/arm/patches/README
@@ -43,10 +43,12 @@ o Texas Instrument OMAP3
 
 ---- IMX51
 
-1- Checkout the "rel_imx_2.6.31_10.02.00" tag in the Freescale IMX git [2];
-2- apply the adeos-ipipe-2.6.31-arm-1.15-02.patch patch, you will get
-   a reject in arch/arm/mach-mx3/devices.c which you can ignore;
-3- apply the adeos-ipipe-2.6.31-arm-1.15-01-imx51.patch;
+1- Checkout the "rel_imx_2.6.31_10.02.00" tag in the Freescale IMX git [2],
+   or using the tracking-fsl-imx_2.6.31 branch in the I-pipe git tree [3];
+2- apply the latest ipipe patch for linux 2.6.31, you will get
+   a reject in arch/arm/mach-mx3/devices.c, and one in 
+   arch/arm/plat-mxc/include/mach/gpio.h which you can ignore;
+3- apply the ipipe-2.6.31-arm-*-imx51.patch;
 4- you can resume to generic installation instructions.
 
 
@@ -54,3 +56,5 @@ o Texas Instrument OMAP3
 
 [1] http://www.gna.org/projects/adeos/
 [2] http://opensource.freescale.com/pub/scm/imx/linux-2.6-imx.git
+[3] git://git.denx.de/ipipe-2.6.git
+
diff --git a/ksrc/arch/arm/patches/ipipe-2.6.31-arm-1.16-02-imx51.patch 
b/ksrc/arch/arm/patches/ipipe-2.6.31-arm-1.16-02-imx51.patch
new file mode 100644
index 0000000..8a80068
--- /dev/null
+++ b/ksrc/arch/arm/patches/ipipe-2.6.31-arm-1.16-02-imx51.patch
@@ -0,0 +1,89 @@
+diff --git a/arch/arm/Makefile b/arch/arm/Makefile
+index d22dff6..31a4aea 100644
+--- a/arch/arm/Makefile
++++ b/arch/arm/Makefile
+@@ -50,7 +50,7 @@ comma = ,
+ # Note that GCC does not numerically define an architecture version
+ # macro, but instead defines a whole series of macros which makes
+ # testing for a specific architecture or later rather impossible.
+-arch-$(CONFIG_CPU_32v7)               :=-D__LINUX_ARM_ARCH__=7 $(call 
cc-option,-march=armv7a,-march=armv5t -Wa$(comma)-march=armv7a)
++arch-$(CONFIG_CPU_32v7)               :=-D__LINUX_ARM_ARCH__=7 $(call 
cc-option,-march=armv7-a,$(call cc-option,-march=armv7a,-march=armv5t 
-Wa$(comma)-march=armv7a))
+ arch-$(CONFIG_CPU_32v6)               :=-D__LINUX_ARM_ARCH__=6 $(call 
cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6)
+ # Only override the compiler option if ARMv6. The ARMv6K extensions are
+ # always available in ARMv7
+diff --git a/arch/arm/mach-mx51/mx51_3stack.c 
b/arch/arm/mach-mx51/mx51_3stack.c
+index 8496569..97a5ae9 100644
+--- a/arch/arm/mach-mx51/mx51_3stack.c
++++ b/arch/arm/mach-mx51/mx51_3stack.c
+@@ -798,7 +798,7 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc 
*desc)
+                              expio_irq);
+                       BUG();  /* oops */
+               }
+-              d->handle_irq(expio_irq, d);
++              ipipe_handle_irq_cond(expio_irq);
+       }
+ 
+       out:
+diff --git a/arch/arm/plat-mxc/include/mach/gpio.h 
b/arch/arm/plat-mxc/include/mach/gpio.h
+index 9f382e6..3d03152 100644
+--- a/arch/arm/plat-mxc/include/mach/gpio.h
++++ b/arch/arm/plat-mxc/include/mach/gpio.h
+@@ -39,6 +39,7 @@ struct mxc_gpio_port {
+       u32 both_edges;
+       u32 suspend_wakeup;
+       u32 saved_wakeup;
++      ipipe_spinlock_t lock;
+ };
+ 
+ int mxc_gpio_init(struct mxc_gpio_port*, int);
+diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
+index 867005d..b8aa3e9 100644
+--- a/arch/arm/plat-mxc/time.c
++++ b/arch/arm/plat-mxc/time.c
+@@ -113,8 +113,8 @@ void __ipipe_mach_get_tscinfo(struct __ipipe_tscinfo *info)
+ #ifdef CONFIG_ARCH_MX2
+               info->u.fr.counter = (unsigned *) (GPT1_BASE_ADDR + MX1_2_TCN);
+ #endif
+-      } else if (cpu_is_mx3()) {
+-#ifdef CONFIG_ARCH_MX3
++      } else if (timer_is_v2()) {
++#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX35) || 
defined(CONFIG_ARCH_MX37) || defined(CONFIG_ARCH_MX51)
+               info->u.fr.counter = (unsigned *) (GPT1_BASE_ADDR + MX3_TCN);
+ #endif
+       }
+@@ -434,7 +434,7 @@ static void ipipe_mach_update_tsc(void)
+ 
+       local_irq_save_hw(flags);
+       local_tsc = &tsc[ipipe_processor_id()];
+-      if (!cpu_is_mx3())
++      if (!timer_is_v2())
+               stamp = __raw_readl(timer_base + MX1_2_TCN);
+       else
+               stamp = __raw_readl(timer_base + MX3_TCN);
+@@ -453,7 +453,7 @@ notrace unsigned long long __ipipe_mach_get_tsc(void)
+ 
+               local_tsc = &tsc[ipipe_processor_id()];
+ 
+-              if (!cpu_is_mx3())  {
++              if (!timer_is_v2())  {
+                       __asm__ ("ldmia %1, %M0\n"
+                                : "=r"(result.full), "+&r"(local_tsc)
+                                : "m"(*local_tsc));
+@@ -488,7 +488,7 @@ void __ipipe_mach_set_dec(unsigned long delay)
+               unsigned long flags;
+ 
+               local_irq_save_hw(flags);
+-              if (!cpu_is_mx3())
++              if (!timer_is_v2())
+                       mx1_2_set_next_event(delay, NULL);
+               else
+                       mx3_set_next_event(delay, NULL);
+@@ -508,7 +508,7 @@ EXPORT_SYMBOL(__ipipe_mach_release_timer);
+ 
+ unsigned long __ipipe_mach_get_dec(void)
+ {
+-      if (!cpu_is_mx3())
++      if (!timer_is_v2())
+               return __raw_readl(timer_base + MX1_2_TCMP)
+                       - __raw_readl(timer_base + MX1_2_TCN);
+       else


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