Module: xenomai-head
Branch: master
Commit: 0adfae6ade3bec2d3158992b656dd086e039607d
URL:    
http://git.xenomai.org/?p=xenomai-head.git;a=commit;h=0adfae6ade3bec2d3158992b656dd086e039607d

Author: Gilles Chanteperdrix <gilles.chanteperd...@xenomai.org>
Date:   Wed Jun 22 20:05:19 2011 +0200

hal: remove support for NMI watchdog

---

 include/asm-arm/bits/intr.h       |    5 -
 include/asm-blackfin/bits/intr.h  |    7 -
 include/asm-blackfin/bits/timer.h |    8 -
 include/asm-generic/hal.h         |   23 ---
 include/asm-nios2/bits/intr.h     |    4 -
 include/asm-powerpc/bits/intr.h   |    5 -
 include/asm-sh/bits/intr.h        |    4 -
 include/asm-sim/bits/intr.h       |    5 -
 include/asm-x86/bits/intr.h       |    7 -
 include/asm-x86/bits/timer.h      |    7 -
 ksrc/arch/blackfin/Kconfig        |   30 ----
 ksrc/arch/blackfin/Makefile       |    3 -
 ksrc/arch/blackfin/hal.c          |   42 -----
 ksrc/arch/blackfin/nmi.c          |   99 -----------
 ksrc/arch/blackfin/switch.S       |   47 ++----
 ksrc/arch/generic/Makefile        |    4 -
 ksrc/arch/generic/nmi.c           |   61 -------
 ksrc/arch/x86/Config.in           |   29 +--
 ksrc/arch/x86/Kconfig             |  236 ++++++++++++---------------
 ksrc/arch/x86/Makefile            |    4 -
 ksrc/arch/x86/hal-common.c        |   58 +-------
 ksrc/arch/x86/hal_32.c            |   12 +--
 ksrc/arch/x86/nmi.c               |  331 -------------------------------------
 ksrc/nucleus/intr.c               |    2 -
 ksrc/nucleus/pod.c                |   43 -----
 25 files changed, 131 insertions(+), 945 deletions(-)

diff --git a/include/asm-arm/bits/intr.h b/include/asm-arm/bits/intr.h
index 53c9eae..06d4a6c 100644
--- a/include/asm-arm/bits/intr.h
+++ b/include/asm-arm/bits/intr.h
@@ -30,9 +30,4 @@ static inline void xnarch_relay_tick(void)
        rthal_irq_host_pend(RTHAL_TIMER_IRQ);
 }
 
-static inline void xnarch_announce_tick(void)
-{
-       /* empty */
-}
-
 #endif /* !_XENO_ASM_ARM_BITS_INTR_H */
diff --git a/include/asm-blackfin/bits/intr.h b/include/asm-blackfin/bits/intr.h
index 608686f..958c755 100644
--- a/include/asm-blackfin/bits/intr.h
+++ b/include/asm-blackfin/bits/intr.h
@@ -29,11 +29,4 @@ static inline void xnarch_relay_tick(void)
 #endif
 }
 
-static inline void xnarch_announce_tick(void)
-{
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       rthal_nmi_disarm();
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
-}
-
 #endif /* !_XENO_ASM_BLACKFIN_BITS_INTR_H */
diff --git a/include/asm-blackfin/bits/timer.h 
b/include/asm-blackfin/bits/timer.h
index 1b2934f..9caface 100644
--- a/include/asm-blackfin/bits/timer.h
+++ b/include/asm-blackfin/bits/timer.h
@@ -29,14 +29,6 @@ static inline void xnarch_program_timer_shot(unsigned long 
delay)
        /* The core timer runs at the core clock rate -- therefore no
           conversion is needed between TSC and delay values. */
        rthal_timer_program_shot(delay);
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       {
-               extern unsigned long rthal_maxlat_tsc;
-               delay = rthal_imuldiv(delay, RTHAL_NMICLK_FREQ, RTHAL_CPU_FREQ);
-               if (delay <= ULONG_MAX - rthal_maxlat_tsc)
-                       rthal_nmi_arm(delay + rthal_maxlat_tsc);
-       }
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
 }
 
 static inline int xnarch_send_timer_ipi(xnarch_cpumask_t mask)
diff --git a/include/asm-generic/hal.h b/include/asm-generic/hal.h
index 55cf1d8..7b4b975 100644
--- a/include/asm-generic/hal.h
+++ b/include/asm-generic/hal.h
@@ -477,29 +477,6 @@ unsigned long rthal_critical_enter(void (*synch)(void));
 
 void rthal_critical_exit(unsigned long flags);
 
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-
-extern unsigned int rthal_maxlat_us;
-
-extern unsigned long rthal_maxlat_tsc;
-
-void rthal_nmi_init(void (*emergency)(struct pt_regs *));
-
-int rthal_nmi_request(void (*emergency)(struct pt_regs *));
-
-void rthal_nmi_release(void);
-
-void rthal_nmi_arm(unsigned long delay);
-
-void rthal_nmi_disarm(void);
-
-void rthal_nmi_set_maxlat(unsigned int maxlat_us);
-
-#else /* !CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
-#define rthal_nmi_init(efn)            do { } while(0)
-#define rthal_nmi_release()            do { } while(0)
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
-
     /* Public interface */
 
 #ifdef __cplusplus
diff --git a/include/asm-nios2/bits/intr.h b/include/asm-nios2/bits/intr.h
index a840827..3871815 100644
--- a/include/asm-nios2/bits/intr.h
+++ b/include/asm-nios2/bits/intr.h
@@ -30,8 +30,4 @@ static inline void xnarch_relay_tick(void)
         */
 }
 
-static inline void xnarch_announce_tick(void)
-{
-}
-
 #endif /* !_XENO_ASM_NIOS2_BITS_INTR_H */
diff --git a/include/asm-powerpc/bits/intr.h b/include/asm-powerpc/bits/intr.h
index 08c8e40..c6053e1 100644
--- a/include/asm-powerpc/bits/intr.h
+++ b/include/asm-powerpc/bits/intr.h
@@ -35,9 +35,4 @@ static inline void xnarch_relay_tick(void)
        rthal_irq_host_pend(RTHAL_TIMER_IRQ);
 }
 
-static inline void xnarch_announce_tick(void)
-{
-       /* empty */
-}
-
 #endif /* !_XENO_ASM_POWERPC_BITS_INTR_H */
diff --git a/include/asm-sh/bits/intr.h b/include/asm-sh/bits/intr.h
index 582c70e..7ef54f5 100644
--- a/include/asm-sh/bits/intr.h
+++ b/include/asm-sh/bits/intr.h
@@ -27,8 +27,4 @@ static inline void xnarch_relay_tick(void)
        rthal_irq_host_pend(RTHAL_TIMER_IRQ);
 }
 
-static inline void xnarch_announce_tick(void)
-{
-}
-
 #endif /* !_XENO_ASM_SH_BITS_INTR_H */
diff --git a/include/asm-sim/bits/intr.h b/include/asm-sim/bits/intr.h
index af02a82..2cf0ddf 100644
--- a/include/asm-sim/bits/intr.h
+++ b/include/asm-sim/bits/intr.h
@@ -67,11 +67,6 @@ static inline void xnarch_relay_tick(void)
        /* empty */
 }
 
-static inline void xnarch_announce_tick(void)
-{
-       /* empty */
-}
-
 static inline void *xnarch_get_irq_cookie(unsigned irq)
 {
        return NULL;            /* Unsupported. */
diff --git a/include/asm-x86/bits/intr.h b/include/asm-x86/bits/intr.h
index a7f9744..d6acee7 100644
--- a/include/asm-x86/bits/intr.h
+++ b/include/asm-x86/bits/intr.h
@@ -27,11 +27,4 @@ static inline void xnarch_relay_tick(void)
        rthal_irq_host_pend(RTHAL_HOST_TICK_IRQ);
 }
 
-static inline void xnarch_announce_tick(void)
-{
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       rthal_nmi_disarm();
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
-}
-
 #endif /* !_XENO_ASM_X86_BITS_INTR_H */
diff --git a/include/asm-x86/bits/timer.h b/include/asm-x86/bits/timer.h
index 3cfb0af..8da40c8 100644
--- a/include/asm-x86/bits/timer.h
+++ b/include/asm-x86/bits/timer.h
@@ -34,13 +34,6 @@ static inline void xnarch_program_timer_shot(unsigned long 
delay)
         */
        rthal_timer_program_shot(rthal_imuldiv_ceil
                                 (delay, RTHAL_TIMER_FREQ, RTHAL_CPU_FREQ));
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       {
-               extern unsigned long rthal_maxlat_tsc;
-               if (delay <= (LONG_MAX - rthal_maxlat_tsc))
-                       rthal_nmi_arm(delay + rthal_maxlat_tsc);
-       }
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
 }
 
 static inline int xnarch_send_timer_ipi(xnarch_cpumask_t mask)
diff --git a/ksrc/arch/blackfin/Kconfig b/ksrc/arch/blackfin/Kconfig
index c4ea5f8..7cef4d2 100644
--- a/ksrc/arch/blackfin/Kconfig
+++ b/ksrc/arch/blackfin/Kconfig
@@ -8,36 +8,6 @@ menu "Machine"
 
 depends on XENO_OPT_NUCLEUS
 
-menu "NMI watchdog"
-
-config XENO_HW_NMI_DEBUG_LATENCY
-        bool "Enable NMI watchdog"
-        default n
-       select DEBUG_ICACHE_CHECK
-        help
-        Enabling this option allows the NMI watchdog to be used in order
-        to debug abnormal (timer) interrupt latencies.
-
-        The NMI watchog is programmed in order to expire a certain time 
-        after the currently awaited timer shot, and triggers if the shot 
-        did not happen as expected. This allowed amount of jitter is 
-        configurable. When triggered, the NMI watchdog prints the call
-        stack and causes a kernel panic, which should hopefully allow to
-        find out why the timer got delayed.
-
-        This option is mainly useful for debugging Xenomai internals, and 
-        not meant for debugging applications.
-
-config XENO_HW_NMI_DEBUG_LATENCY_MAX
-        depends on XENO_HW_NMI_DEBUG_LATENCY
-        int "NMI watchdog latency threshold (us)"
-        default 100
-        help
-        When the timer interrupt latency goes above this threshold, the
-        NMI watchdog pulls the handbrake.
-
-endmenu
-
 endmenu
 
 source "kernel/xenomai/skins/Kconfig"
diff --git a/ksrc/arch/blackfin/Makefile b/ksrc/arch/blackfin/Makefile
index 302a0f4..8bf1649 100644
--- a/ksrc/arch/blackfin/Makefile
+++ b/ksrc/arch/blackfin/Makefile
@@ -1,4 +1,3 @@
-
 obj-$(CONFIG_XENOMAI) += xeno_hal.o
 
 xeno_hal-y := hal.o switch.o
@@ -7,6 +6,4 @@ ifndef CONFIG_SMP
 xeno_hal-y += atomic.o
 endif
 
-xeno_hal-$(CONFIG_XENO_HW_NMI_DEBUG_LATENCY) += nmi.o
-
 EXTRA_CFLAGS += -D__IN_XENOMAI__ -Iinclude/xenomai
diff --git a/ksrc/arch/blackfin/hal.c b/ksrc/arch/blackfin/hal.c
index 12fcf49..7be2b74 100644
--- a/ksrc/arch/blackfin/hal.c
+++ b/ksrc/arch/blackfin/hal.c
@@ -66,34 +66,6 @@ static int rthal_timer_ack(unsigned irq)
 #define rthal_timer_ack NULL
 #endif
 
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-
-asmlinkage void irq_panic(int reason, struct pt_regs *regs);
-
-static void rthal_latency_above_max(struct pt_regs *regs)
-{
-       unsigned long ilat, ipend, imask, sic_imask;
-
-       ilat = bfin_read_ILAT();
-       ipend = bfin_read_IPEND();
-       imask = bfin_read_IMASK();
-#ifdef CONFIG_BF561
-       sic_imask = bfin_read_SIC_IMASK(0);
-#else
-       sic_imask = bfin_read_SIC_IMASK();
-#endif
-
-       rthal_emergency_console();
-       printk("NMI watchdog detected timer latency above %u us\n",
-              rthal_maxlat_us);
-       printk("[ILAT=0x%lx, IPEND=0x%lx, IMASK=0x%lx, SIC_IMASK=0x%lx]\n",
-              ilat, ipend, imask, sic_imask);
-       dump_stack();
-       irq_panic(IRQ_NMI, regs);
-}
-
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY_MAX */
-
 static inline void rthal_setup_oneshot_coretmr(void)
 {
        bfin_write_TCNTL(TMPWR);
@@ -212,10 +184,6 @@ int rthal_timer_request(
 
        rthal_timer_set_oneshot(1);
 
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       rthal_nmi_init(&rthal_latency_above_max);
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
-
 out:
        return tickval;
 }
@@ -227,9 +195,6 @@ void rthal_timer_release(int cpu)
        if (--cpu_timers_requested > 0)
                return;
 
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       rthal_nmi_release();
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
        rthal_irq_release(RTHAL_TIMER_IRQ);
 
        if (rthal_ktimer_saved_mode == KTIMER_MODE_PERIODIC)
@@ -283,10 +248,6 @@ int rthal_timer_request(void (*tick_handler) (void), int 
cpu)
        rthal_timer_set_oneshot(1);
        rthal_irq_enable(RTHAL_TIMER_IRQ);
 
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       rthal_nmi_init(&rthal_latency_above_max);
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
-
        return 0;
 }
 
@@ -295,9 +256,6 @@ void rthal_timer_release(int cpu)
        if (--cpu_timers_requested > 0)
                return;
 
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       rthal_nmi_release();
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
        rthal_irq_disable(RTHAL_TIMER_IRQ);
        rthal_irq_release(RTHAL_TIMER_IRQ);
        rthal_timer_set_periodic();
diff --git a/ksrc/arch/blackfin/nmi.c b/ksrc/arch/blackfin/nmi.c
deleted file mode 100644
index 4d163ca..0000000
--- a/ksrc/arch/blackfin/nmi.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/**
- *   @ingroup hal
- *   @file
- *
- *   NMI watchdog support.
- *
- *   Copyright (C) 2005 Philippe Gerum.
- *
- *   Xenomai is free software; you can redistribute it and/or
- *   modify it under the terms of the GNU General Public License as
- *   published by the Free Software Foundation, Inc., 675 Mass Ave,
- *   Cambridge MA 02139, USA; either version 2 of the License, or (at
- *   your option) any later version.
- *
- *   Xenomai is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- *   General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
- *   02111-1307, USA.
- */
-
-#include <linux/version.h>
-#include <linux/slab.h>
-#include <linux/errno.h>
-#include <linux/module.h>
-#include <asm/system.h>
-#include <asm/atomic.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/unistd.h>
-#include <asm/xenomai/hal.h>
-
-static void (*rthal_nmi_emergency) (struct pt_regs *);
-
-static volatile void *rthal_old_nmi_handler;
-
-asmlinkage void rthal_nmi_handler(struct pt_regs *regs);
-
-asmlinkage void rthal_nmi_tick(struct pt_regs *regs)
-{
-       rthal_nmi_emergency(regs);
-}
-
-int rthal_nmi_request(void (*emergency) (struct pt_regs *))
-{
-       if (rthal_nmi_emergency)
-               return -EBUSY;
-
-       rthal_nmi_disarm();
-       CSYNC();
-       rthal_nmi_emergency = emergency;
-       rthal_old_nmi_handler = (void *)bfin_read_EVT2();
-       bfin_write_EVT2(&rthal_nmi_handler);
-       CSYNC();
-
-       return 0;
-}
-
-void rthal_nmi_release(void)
-{
-       if (rthal_nmi_emergency == NULL)
-               return;
-
-       rthal_nmi_disarm();
-       CSYNC();
-       bfin_write_EVT2(rthal_old_nmi_handler);
-       CSYNC();
-       rthal_nmi_emergency = NULL;
-}
-
-#ifdef CONFIG_BF561
-#define write_wdog(reg, val)   bfin_write_WDOGA_##reg(val)
-#else
-#define write_wdog(reg, val)   bfin_write_WDOG_##reg(val)
-#endif
-
-void rthal_nmi_arm(unsigned long delay)
-{
-       write_wdog(CTL, 0xad0); /* Disable */
-       CSYNC();
-       write_wdog(CNT, delay);
-       write_wdog(CTL, 0x2);   /* Enable, generate NMIs */
-       CSYNC();
-}
-
-void rthal_nmi_disarm(void)
-{
-       write_wdog(CTL, 0xad0); /* Disable */
-       CSYNC();
-}
-
-EXPORT_SYMBOL_GPL(rthal_nmi_request);
-EXPORT_SYMBOL_GPL(rthal_nmi_release);
-EXPORT_SYMBOL_GPL(rthal_nmi_arm);
-EXPORT_SYMBOL_GPL(rthal_nmi_disarm);
diff --git a/ksrc/arch/blackfin/switch.S b/ksrc/arch/blackfin/switch.S
index 68eae2e..1a28e56 100644
--- a/ksrc/arch/blackfin/switch.S
+++ b/ksrc/arch/blackfin/switch.S
@@ -30,7 +30,7 @@
  * threads is possible.
  *
  * We protect all caller-saved registers across switches.
- * 
+ *
  * void rthal_thread_switch(struct thread_struct *prev, struct thread_struct 
*next)
  */
 ENTRY(_rthal_thread_switch)
@@ -65,9 +65,9 @@ switch_point:
        rts;
 
 ENTRY(_rthal_thread_trampoline)
-       r0 = [sp++]; 
+       r0 = [sp++];
        jump switch_point
-       
+
 /*
  * Check for a reason to block context switching for Xenomai. This may
  * be the case, if:
@@ -80,7 +80,7 @@ ENTRY(_rthal_thread_trampoline)
  * - more than a single interrupt is pending in IPEND. In such a case,
  * switching context would cause the core to branch back to kernel
  * code without supervisor privileges (due to nested RTIs).
- * 
+ *
  * int rthal_defer_switch_p(void)
  */
 
@@ -88,38 +88,23 @@ ENTRY(_rthal_defer_switch_p)
 
 #ifdef CONFIG_XENO_OPT_PERVASIVE
        p2.l = lo(ILAT);
-        p2.h = hi(ILAT);
-        r0 = [p2];
+       p2.h = hi(ILAT);
+       r0 = [p2];
        r1 = EVT_IVG15 (z);
-        r0 = r0 & r1;
+       r0 = r0 & r1;
        cc = r0 == 0;
        if !cc jump 1f;
 #endif /* CONFIG_XENO_OPT_PERVASIVE */
        p2.l = lo(IPEND);
-        p2.h = hi(IPEND);
+       p2.h = hi(IPEND);
        csync;
-        r2 = [p2];
-        r1 = LO(~0x13) (Z);
-        r0 = r2 & r1;
-        cc = r0 == 0;
-        if cc jump 1f;
-        r1 = 1;
-        r1 = r0 - r1;
-        r0 = r0 & r1;
+       r2 = [p2];
+       r1 = LO(~0x13) (Z);
+       r0 = r2 & r1;
+       cc = r0 == 0;
+       if cc jump 1f;
+       r1 = 1;
+       r1 = r0 - r1;
+       r0 = r0 & r1;
 1:
        rts
-
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-
-#include <asm/context.S>
-
-ENTRY(_rthal_nmi_handler)
-       SAVE_ALL_SYS
-       r0 = sp;
-       SP += -12;      
-       call _rthal_nmi_tick
-       SP += 12;       
-       RESTORE_ALL_SYS
-       rtn; 
-               
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
diff --git a/ksrc/arch/generic/Makefile b/ksrc/arch/generic/Makefile
index 5bfc7a7..6c23f50 100644
--- a/ksrc/arch/generic/Makefile
+++ b/ksrc/arch/generic/Makefile
@@ -6,8 +6,6 @@ obj-$(CONFIG_XENOMAI) += xeno_hal.o
 
 xeno_hal-y := hal.o
 
-xeno_hal-$(CONFIG_XENO_HW_NMI_DEBUG_LATENCY) += nmi.o
-
 EXTRA_CFLAGS += -D__IN_XENOMAI__ -Iinclude/xenomai
 
 else
@@ -18,8 +16,6 @@ O_TARGET := built-in.o
 
 obj-y := hal.o compat.o
 
-obj-$(CONFIG_XENO_HW_NMI_DEBUG_LATENCY) += nmi.o
-
 export-objs := $(obj-y)
 
 EXTRA_CFLAGS += -D__IN_XENOMAI__ -I$(TOPDIR)/include/xenomai 
-I$(TOPDIR)/include/xenomai/compat
diff --git a/ksrc/arch/generic/nmi.c b/ksrc/arch/generic/nmi.c
deleted file mode 100644
index 0c99ecf..0000000
--- a/ksrc/arch/generic/nmi.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/**
- *   @ingroup hal
- *   @file
- *
- *   Adeos-based Real-Time Abstraction Layer for x86.
- *
- *   Copyright &copy; 2005 Gilles Chanteperdrix.
- *
- *   Xenomai is free software; you can redistribute it and/or
- *   modify it under the terms of the GNU General Public License as
- *   published by the Free Software Foundation, Inc., 675 Mass Ave,
- *   Cambridge MA 02139, USA; either version 2 of the License, or (at
- *   your option) any later version.
- *
- *   Xenomai is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- *   General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
- *   02111-1307, USA.
- */
-
-/**
- * @addtogroup hal
- *
- * Generic NMI watchdog services.
- *
- *@{*/
-
-#include <linux/module.h>
-#include <asm/xenomai/hal.h>
-
-unsigned int rthal_maxlat_us;
-EXPORT_SYMBOL_GPL(rthal_maxlat_tsc);
-
-unsigned long rthal_maxlat_tsc;
-EXPORT_SYMBOL_GPL(rthal_maxlat_us);
-
-void rthal_nmi_set_maxlat(unsigned int maxlat_us)
-{
-       rthal_maxlat_us = maxlat_us;
-       rthal_maxlat_tsc = rthal_llimd(maxlat_us * 1000ULL,
-                                      RTHAL_NMICLK_FREQ, 1000000000);
-}
-
-void __init rthal_nmi_init(void (*emergency) (struct pt_regs *))
-{
-       rthal_nmi_set_maxlat(CONFIG_XENO_HW_NMI_DEBUG_LATENCY_MAX);
-       rthal_nmi_release();
-
-       if (rthal_nmi_request(emergency))
-               printk("Xenomai: NMI watchdog not available.\n");
-       else
-               printk("Xenomai: NMI watchdog started (threshold=%u us).\n",
-                      rthal_maxlat_us);
-}
-
-/*@}*/
diff --git a/ksrc/arch/x86/Config.in b/ksrc/arch/x86/Config.in
index 75fdf3f..95b3efe 100644
--- a/ksrc/arch/x86/Config.in
+++ b/ksrc/arch/x86/Config.in
@@ -15,20 +15,11 @@ else
 
     if [ "$CONFIG_XENOMAI" = "y" -a "$CONFIG_XENO_OPT_NUCLEUS" != "n" ]; then
 
-        define_bool CONFIG_XENO_GENERIC_STACKPOOL y
+       define_bool CONFIG_XENO_GENERIC_STACKPOOL y
        mainmenu_option next_comment
        comment 'Machine'
        bool 'Enable FPU support' CONFIG_XENO_HW_FPU
 
-       if [ "$CONFIG_X86_LOCAL_APIC" = "y" ]; then
-          mainmenu_option next_comment
-          comment 'NMI watchdog'
-          bool 'Enable NMI watchdog' CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-          if [ "$CONFIG_XENO_HW_NMI_DEBUG_LATENCY" != "n" ]; then
-              int 'NMI watchdog latency threshold (us)' 
CONFIG_XENO_HW_NMI_DEBUG_LATENCY_MAX 0
-          fi
-          endmenu
-       fi
        mainmenu_option next_comment
        comment 'SMI workaround'
        bool 'Disable SMI detection' CONFIG_XENO_HW_SMI_DETECT_DISABLE
@@ -38,15 +29,15 @@ else
           if [ "$CONFIG_XENO_HW_SMI_WORKAROUND" != "n" ]; then
              bool 'Globally disable SMI' CONFIG_XENO_HW_SMI_ALL
              if [ "$CONFIG_XENO_HW_SMI_ALL" != "y" ]; then
-                bool 'Enable Intel-Specific USB2 SMI' 
CONFIG_XENO_HW_SMI_INTEL_USB2
-                bool 'Enable legacy USB2 SMI' CONFIG_XENO_HW_SMI_LEGACY_USB2
-                bool 'Enable periodic SMI' CONFIG_XENO_HW_SMI_PERIODIC
-                bool 'Enable TCO SMI' CONFIG_XENO_HW_SMI_TCO
-                bool 'Enable microcontroller SMI' CONFIG_XENO_HW_SMI_MC
-                bool 'Enable APM SMI' CONFIG_XENO_HW_SMI_APMC
-                bool 'Enable legacy USB SMI' CONFIG_XENO_HW_SMI_LEGACY_USB
-                bool 'Enable ACPI BIOS SMI' CONFIG_XENO_HW_SMI_BIOS
-              fi
+                bool 'Enable Intel-Specific USB2 SMI' 
CONFIG_XENO_HW_SMI_INTEL_USB2
+                bool 'Enable legacy USB2 SMI' CONFIG_XENO_HW_SMI_LEGACY_USB2
+                bool 'Enable periodic SMI' CONFIG_XENO_HW_SMI_PERIODIC
+                bool 'Enable TCO SMI' CONFIG_XENO_HW_SMI_TCO
+                bool 'Enable microcontroller SMI' CONFIG_XENO_HW_SMI_MC
+                bool 'Enable APM SMI' CONFIG_XENO_HW_SMI_APMC
+                bool 'Enable legacy USB SMI' CONFIG_XENO_HW_SMI_LEGACY_USB
+                bool 'Enable ACPI BIOS SMI' CONFIG_XENO_HW_SMI_BIOS
+             fi
           fi
        fi
        endmenu
diff --git a/ksrc/arch/x86/Kconfig b/ksrc/arch/x86/Kconfig
index abecbda..a72acc2 100644
--- a/ksrc/arch/x86/Kconfig
+++ b/ksrc/arch/x86/Kconfig
@@ -26,166 +26,136 @@ config XENO_HW_FPU
        Float-Point Unit on the x86 platform at the following URL:
        http://www.intel.com/design/intarch/techinfo/Pentium/fpu.htm
 
-menu "NMI watchdog"
-
-config XENO_HW_NMI_DEBUG_LATENCY
-        depends on X86_LOCAL_APIC
-        bool "Enable NMI watchdog"
-        default n
-        help
-        Enabling this option allows the NMI watchdog to be used in order
-        to debug abnormal (timer) interrupt latencies.
-
-        The NMI watchog is programmed in order to expire a certain time 
-        after the currently awaited timer shot, and triggers if the shot 
-        did not happen as expected. This allowed amount of jitter is 
-        configurable. When triggered, the NMI watchdog prints the call
-        stack and causes a kernel panic, which should hopefully allow to
-        find out why the timer got delayed.
-
-        This option is mainly useful for debugging Xenomai internals, and 
-        not meant for debugging applications.
-
-config XENO_HW_NMI_DEBUG_LATENCY_MAX
-        depends on XENO_HW_NMI_DEBUG_LATENCY
-        int "NMI watchdog latency threshold (us)"
-        default 100
-        help
-        When the timer interrupt latency goes above this threshold, the
-        NMI watchdog pulls the handbrake.
-
-endmenu
-
 menu "SMI workaround"
 
 config XENO_HW_SMI_DETECT_DISABLE
-        bool "Disable SMI detection"
-        default n
-        help
-        SMI are System Management Interrupts, generated by Intel ICH
-        (I/O connector hubs) to allow handling of some specific events;
-        on systems where they exist, they are the highest priority
-        interrupts (even higher priority than NMIs). Common SMI sources
-        are power management, legacy devices emulation by BIOS, SMBus
-        and TCO watchdog. 
-
-        SMI are problematic for Xenomai, because their handling may span
-        accross hundreds of microseconds, causing unacceptable interrupt 
-        latency. Furthermore, their vectors are stored in some ROM, 
-        and hence may not be altered.
-
-        For this reason, Xenomai contains code to detect chipsets using
-        SMIs and optionally activate some workarounds to stop SMIs.
-        
-        Enabling this option prevents Xenomai from detecting whether 
-        your hardware use SMIs. This option is mostly useful if you know
-        that your system does not use SMIs and really want to size Xenomai 
-        modules down. The detection code has no run-time space overhead,
-        and a tiny memory footprint (<200 bytes on x86)
+       bool "Disable SMI detection"
+       default n
+       help
+       SMI are System Management Interrupts, generated by Intel ICH
+       (I/O connector hubs) to allow handling of some specific events;
+       on systems where they exist, they are the highest priority
+       interrupts (even higher priority than NMIs). Common SMI sources
+       are power management, legacy devices emulation by BIOS, SMBus
+       and TCO watchdog.
+
+       SMI are problematic for Xenomai, because their handling may span
+       accross hundreds of microseconds, causing unacceptable interrupt
+       latency. Furthermore, their vectors are stored in some ROM,
+       and hence may not be altered.
+
+       For this reason, Xenomai contains code to detect chipsets using
+       SMIs and optionally activate some workarounds to stop SMIs.
+
+       Enabling this option prevents Xenomai from detecting whether
+       your hardware use SMIs. This option is mostly useful if you know
+       that your system does not use SMIs and really want to size Xenomai
+       modules down. The detection code has no run-time space overhead,
+       and a tiny memory footprint (<200 bytes on x86)
 
 config XENO_HW_SMI_DETECT
-        bool
-        depends on !XENO_HW_SMI_DETECT_DISABLE
-        default y
+       bool
+       depends on !XENO_HW_SMI_DETECT_DISABLE
+       default y
 
 config XENO_HW_SMI_WORKAROUND
-        depends on XENO_HW_SMI_DETECT
-        bool "Enable SMI workaround"
-        default n
-        help
-        SMI are System Management Interrupts, generated by Intel ICH
-        (I/O connector hubs) to allow handling of some specific events;
-        on systems where they exist, they are the highest priority
-        interrupts (even higher priority than NMIs). Common SMI sources
-        are power management, legacy devices emulation by BIOS, SMBus
-        and TCO watchdog. 
-
-        SMI are problematic for Xenomai, because their handling may span
-        accross hundreds of microseconds, causing unacceptable interrupt 
-        latency. Furthermore, their vectors are stored in some ROM, 
-        and hence may not be altered.
-
-        For this reason, Xenomai contains code to detect chipsets using
-        SMIs and optionally activate some workarounds to stop SMIs.
-        Enabling this option cause those workarounds to be activated.
+       depends on XENO_HW_SMI_DETECT
+       bool "Enable SMI workaround"
+       default n
+       help
+       SMI are System Management Interrupts, generated by Intel ICH
+       (I/O connector hubs) to allow handling of some specific events;
+       on systems where they exist, they are the highest priority
+       interrupts (even higher priority than NMIs). Common SMI sources
+       are power management, legacy devices emulation by BIOS, SMBus
+       and TCO watchdog.
+
+       SMI are problematic for Xenomai, because their handling may span
+       accross hundreds of microseconds, causing unacceptable interrupt
+       latency. Furthermore, their vectors are stored in some ROM,
+       and hence may not be altered.
+
+       For this reason, Xenomai contains code to detect chipsets using
+       SMIs and optionally activate some workarounds to stop SMIs.
+       Enabling this option cause those workarounds to be activated.
 
 if XENO_HW_SMI_WORKAROUND
 
 config XENO_HW_SMI_ALL
-        bool "Globally disable SMI"
-        default y
-        help
-        This option causes the SMIs to be globally disabled, which avoid
-        any jitter they could cause with a big drawback: any peripheral or
-        feature relying on them will stop working when Xenomai is running.
-
-        The alternative is to selectively enable the SMIs sources needed 
-        by your peripherals. The main drawback is that the peripheral 
-        which you need may be the one causing jitter, so that extensive
-        testing is needed when choosing to not disable SMI globally. 
-        Another drawback is that other unknown SMI sources may exist which
-        Xenomai can not disable.
-
-        This option causes the SMIs to be globally disabled.
+       bool "Globally disable SMI"
+       default y
+       help
+       This option causes the SMIs to be globally disabled, which avoid
+       any jitter they could cause with a big drawback: any peripheral or
+       feature relying on them will stop working when Xenomai is running.
+
+       The alternative is to selectively enable the SMIs sources needed
+       by your peripherals. The main drawback is that the peripheral
+       which you need may be the one causing jitter, so that extensive
+       testing is needed when choosing to not disable SMI globally.
+       Another drawback is that other unknown SMI sources may exist which
+       Xenomai can not disable.
+
+       This option causes the SMIs to be globally disabled.
 
 config XENO_HW_SMI_INTEL_USB2
-        bool "Enable Intel-Specific USB2 SMI"
-        depends on !XENO_HW_SMI_ALL
-        default n
-        help
-        This options enables Intel-specific USB2 SMI logic to cause SMIs.
+       bool "Enable Intel-Specific USB2 SMI"
+       depends on !XENO_HW_SMI_ALL
+       default n
+       help
+       This options enables Intel-specific USB2 SMI logic to cause SMIs.
 
 config XENO_HW_SMI_LEGACY_USB2
-        bool "Enable legacy USB2 SMI"
-        depends on !XENO_HW_SMI_ALL
-        default n
-        help
-        This options enables legacy USB2 logic to cause SMIs.
+       bool "Enable legacy USB2 SMI"
+       depends on !XENO_HW_SMI_ALL
+       default n
+       help
+       This options enables legacy USB2 logic to cause SMIs.
 
 config XENO_HW_SMI_PERIODIC
-        bool "Enable periodic SMI"
-        depends on !XENO_HW_SMI_ALL
-        default n
-        help
-        This options enables the ICH to generate a periodic SMI.
+       bool "Enable periodic SMI"
+       depends on !XENO_HW_SMI_ALL
+       default n
+       help
+       This options enables the ICH to generate a periodic SMI.
 
 config XENO_HW_SMI_TCO
-        bool "Enable TCO SMI"
-        depends on !XENO_HW_SMI_ALL
-        default n
-        help
-        This options enables the TCO logic to generate SMIs.
+       bool "Enable TCO SMI"
+       depends on !XENO_HW_SMI_ALL
+       default n
+       help
+       This options enables the TCO logic to generate SMIs.
 
 config XENO_HW_SMI_MC
-        bool "Enable microcontroller SMI"
-        depends on !XENO_HW_SMI_ALL
-        default n
-        help
-        This options enables the ICH to trap access to the 
-        microcontroller range.
+       bool "Enable microcontroller SMI"
+       depends on !XENO_HW_SMI_ALL
+       default n
+       help
+       This options enables the ICH to trap access to the
+       microcontroller range.
 
 config XENO_HW_SMI_APMC
-        bool "Enable APM SMI"
-        depends on !XENO_HW_SMI_ALL
-        default n
-        help
-        This options enables writes to the APM control register to 
-        cause SMIs.
+       bool "Enable APM SMI"
+       depends on !XENO_HW_SMI_ALL
+       default n
+       help
+       This options enables writes to the APM control register to
+       cause SMIs.
 
 config XENO_HW_SMI_LEGACY_USB
-        bool "Enable legacy USB SMI"
-        depends on !XENO_HW_SMI_ALL
-        default n
-        help
-        This options enables legacy USB circuit to cause SMIs.
+       bool "Enable legacy USB SMI"
+       depends on !XENO_HW_SMI_ALL
+       default n
+       help
+       This options enables legacy USB circuit to cause SMIs.
 
 config XENO_HW_SMI_BIOS
-        bool "Enable ACPI BIOS SMI"
-        depends on !XENO_HW_SMI_ALL
-        default n
-        help
-        This options enables SMI to be used for communication
-        between ACPI software and BIOS software.
+       bool "Enable ACPI BIOS SMI"
+       depends on !XENO_HW_SMI_ALL
+       default n
+       help
+       This options enables SMI to be used for communication
+       between ACPI software and BIOS software.
 
 endif
 
diff --git a/ksrc/arch/x86/Makefile b/ksrc/arch/x86/Makefile
index 3296206..3e57e57 100644
--- a/ksrc/arch/x86/Makefile
+++ b/ksrc/arch/x86/Makefile
@@ -12,8 +12,6 @@ obj-$(CONFIG_XENOMAI) += xeno_hal.o
 
 xeno_hal-y := hal_$(X86_MODE).o hal-common.o usercopy_$(X86_MODE).o
 
-xeno_hal-$(CONFIG_XENO_HW_NMI_DEBUG_LATENCY) += nmi.o
-
 xeno_hal-$(CONFIG_XENO_HW_SMI_DETECT) += smi.o
 
 EXTRA_CFLAGS += -D__IN_XENOMAI__ -Iinclude/xenomai
@@ -28,8 +26,6 @@ O_TARGET := built-in.o
 
 obj-y := hal_32.o hal-common.o
 
-obj-$(CONFIG_XENO_HW_NMI_DEBUG_LATENCY) += nmi.o
-
 obj-$(CONFIG_XENO_HW_SMI_DETECT) += smi.o
 
 export-objs := $(obj-y) $(obj-m)
diff --git a/ksrc/arch/x86/hal-common.c b/ksrc/arch/x86/hal-common.c
index 437db30..254beaa 100644
--- a/ksrc/arch/x86/hal-common.c
+++ b/ksrc/arch/x86/hal-common.c
@@ -169,12 +169,9 @@ int rthal_timer_request(
         * The rest of the initialization should only be performed
         * once by a single CPU.
         */
-       if (cpu_timers_requested++ == 0) {
+       if (cpu_timers_requested++ == 0)
                rthal_timer_set_oneshot(1);
 
-               rthal_nmi_init(&rthal_latency_above_max);
-       }
-
        return tickval;
 }
 
@@ -251,8 +248,6 @@ int rthal_timer_request(void (*tick_handler)(void), int cpu)
         * RTHAL_TIMER_IRQ, but that's not the case for legacy x86_64.
         */
        __ipipe_tick_irq = RTHAL_BCAST_TICK_IRQ;
-
-       rthal_nmi_init(&rthal_latency_above_max);
 out:
        return 0;
 }
@@ -277,8 +272,6 @@ void rthal_timer_release(int cpu)
                               &rthal_broadcast_to_local_timers);
 #endif
 
-       rthal_nmi_release();
-
        if (rthal_ktimer_saved_mode == KTIMER_MODE_PERIODIC)
                rthal_timer_set_periodic();
        else if (rthal_ktimer_saved_mode == KTIMER_MODE_ONESHOT)
@@ -287,55 +280,6 @@ void rthal_timer_release(int cpu)
        rthal_irq_release(RTHAL_APIC_TIMER_IPI);
 }
 
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-
-#include <linux/vt_kern.h>
-
-extern void show_registers(struct pt_regs *regs);
-
-extern spinlock_t nmi_print_lock;
-
-void die_nmi(const char *msg, struct pt_regs *regs, int do_panic)
-{
-       spin_lock(&nmi_print_lock);
-       /*
-        * We are in trouble anyway, lets at least try
-        * to get a message out.
-        */
-       bust_spinlocks(1);
-       printk(msg);
-       show_registers(regs);
-       printk("console shuts up ...\n");
-       console_silent();
-       spin_unlock(&nmi_print_lock);
-       bust_spinlocks(0);
-       do_exit(SIGSEGV);
-}
-
-#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) && defined(CONFIG_X86_32)
-#define die_nmi(msg, regs, do_panic)   die_nmi(regs, msg)
-#else /* Linux >= 2.6.27 || CONFIG_X86_64 */
-#include <asm/nmi.h>
-#endif /* Linux >= 2.6.27 || CONFIG_X86_64*/
-
-void rthal_latency_above_max(struct pt_regs *regs)
-{
-       /* Try to report via latency tracer first, then fall back to panic. */
-       if (rthal_trace_user_freeze(rthal_maxlat_us, 1) < 0) {
-               char buf[128];
-
-               snprintf(buf,
-                        sizeof(buf),
-                        "NMI watchdog detected timer latency above %u us\n",
-                        rthal_maxlat_us);
-               die_nmi(buf, regs, 1);
-       }
-}
-
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
-
 #endif /* CONFIG_X86_LOCAL_APIC */
 
 #ifdef CONFIG_GENERIC_CLOCKEVENTS
diff --git a/ksrc/arch/x86/hal_32.c b/ksrc/arch/x86/hal_32.c
index 8cac1b2..05ff9d6 100644
--- a/ksrc/arch/x86/hal_32.c
+++ b/ksrc/arch/x86/hal_32.c
@@ -11,7 +11,7 @@
  *
  *   RTAI/x86 rewrite over Adeos: \n
  *   Copyright &copy; 2002-2007 Philippe Gerum.
- *   NMI watchdog, SMI workaround: \n
+ *   SMI workaround: \n
  *   Copyright &copy; 2004 Gilles Chanteperdrix.
  *
  *   Xenomai is free software; you can redistribute it and/or
@@ -337,16 +337,6 @@ int rthal_arch_init(void)
                rthal_smi_restore();
                return -ENODEV;
        }
-#ifdef CONFIG_GENERIC_CLOCKEVENTS
-       if (nmi_watchdog == NMI_IO_APIC) {
-               printk("Xenomai: NMI kernel watchdog set to NMI_IO_APIC 
(nmi_watchdog=1).\n"
-                      "         This will disable the LAPIC as a clock device, 
and\n"
-                      "         cause Xenomai to fail providing any timing 
service.\n"
-                      "         Use NMI_LOCAL_APIC (nmi_watchdog=2), or 
disable the\n"
-                      "         NMI support entirely (nmi_watchdog=0).");
-               return -ENODEV;
-       }
-#endif
 #elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) && !defined(CONFIG_X86_TSC) 
&& defined(CONFIG_VT)
        /* Prevent the speaker code from bugging our TSC emulation, also
           based on PIT channel 2. kd_mksound is exported by the Adeos
diff --git a/ksrc/arch/x86/nmi.c b/ksrc/arch/x86/nmi.c
deleted file mode 100644
index e661c18..0000000
--- a/ksrc/arch/x86/nmi.c
+++ /dev/null
@@ -1,331 +0,0 @@
-/**
- *   @ingroup hal
- *   @file
- *
- *   NMI watchdog for x86, from linux/arch/i386/kernel/nmi.c
- *
- *   Original authors:
- *   Ingo Molnar, Mikael Pettersson, Pavel Machek.
- *
- *   Adaptation to Xenomai by Gilles Chanteperdrix
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
- *   USA; either version 2 of the License, or (at your option) any later
- *   version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#include <linux/module.h>
-#include <linux/version.h>
-#include <linux/nmi.h>
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
-#include <asm/perf_event.h>
-#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
-#include <asm/perf_counter.h>
-#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
-#include <asm/intel_arch_perfmon.h>
-#else /* Linux < 2.6.19 */
-#include <asm/nmi.h>
-#endif /* Linux < 2.6.19 */
-#else /* Linux < 2.6 */
-#define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architecture PerfMon */
-#define rdmsrl(reg, val)                                       \
-       ({                                                      \
-               unsigned val1, val2;                            \
-               rdmsr(reg, val1, val2);                         \
-               asm ( "": "=A"(val) : "a"(val1), "d"(val2));    \
-       })
-#endif /* Linux < 2.6 */
-#include <asm/msr.h>
-#include <asm/xenomai/hal.h>
-
-#define NMI_WD_ARMED           0x0001
-#define NMI_WD_31BITS          0x1000
-#define NMI_WD_P4              0x2000
-#define NMI_WD_P6_OR_LATER     0x4000
-
-#define P4_ESCR_EVENT_SELECT(N) ((N)<<25)
-#define P4_ESCR_OS              (1<<3)
-#define P4_ESCR_USR             (1<<2)
-#define P4_CCCR_OVF_PMI0        (1<<26)
-#define P4_CCCR_OVF_PMI1        (1<<27)
-#define P4_CCCR_THRESHOLD(N)    ((N)<<20)
-#define P4_CCCR_COMPLEMENT      (1<<19)
-#define P4_CCCR_COMPARE         (1<<18)
-#define P4_CCCR_REQUIRED        (3<<16)
-#define P4_CCCR_ESCR_SELECT(N)  ((N)<<13)
-#define P4_CCCR_ENABLE          (1<<12)
-/* Set up IQ_COUNTER0 to behave like a clock, by having IQ_CCCR0 filter
-   CRU_ESCR0 (with any non-null event selector) through a complemented
-   max threshold. [IA32-Vol3, Section 14.9.9] */
-#define MSR_P4_IQ_COUNTER0      0x30C
-#define P4_NMI_CRU_ESCR0        
(P4_ESCR_EVENT_SELECT(0x3F)|P4_ESCR_OS|P4_ESCR_USR)
-#define P4_NMI_IQ_CCCR0                                                 \
-       (P4_CCCR_OVF_PMI0|P4_CCCR_THRESHOLD(15)|P4_CCCR_COMPLEMENT|     \
-        P4_CCCR_COMPARE|P4_CCCR_REQUIRED|P4_CCCR_ESCR_SELECT(4)|P4_CCCR_ENABLE)
-
-typedef union {
-       struct {
-               /* Xenomai watchdog data. */
-               unsigned long long next_linux_check;
-               unsigned long perfctr_msr;
-               u64 perfctr_checkmask;
-               unsigned int p4_cccr_val;
-               unsigned int flags;
-       };
-       char __pad[SMP_CACHE_BYTES];
-} rthal_nmi_wd_t ____cacheline_aligned;
-
-static rthal_nmi_wd_t rthal_nmi_wds[NR_CPUS];
-static void (*rthal_nmi_emergency) (struct pt_regs *);
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-#define MSR_ARCH_PERFMON_PERFCTR0      0xc1
-#define MSR_ARCH_PERFMON_PERFCTR1      0xc2
-union cpuid10_eax {
-       struct {
-               unsigned int version_id:8;
-               unsigned int num_counters:8;
-               unsigned int bit_width:8;
-               unsigned int mask_length:8;
-       } split;
-       unsigned int full;
-};
-static void (*rthal_linux_nmi_tick) (struct pt_regs *);
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-#define MSR_P4_IQ_CCCR0                0x36C
-#define rthal_nmi_active (nmi_watchdog != NMI_NONE)
-static inline void wrmsrl(unsigned long msr, unsigned long long val)
-{
-       unsigned long lo, hi;
-       lo = (unsigned long)val;
-       hi = val >> 32;
-       wrmsr(msr, lo, hi);
-}
-#else /* Linux 2.6.0..18 */
-extern int nmi_active;
-#define rthal_nmi_active       nmi_active
-#endif /* Linux 2.6.0..18 */
-
-#else /* Linux >= 2.6.19 */
-static int (*rthal_linux_nmi_tick) (struct pt_regs *, unsigned);
-#define rthal_nmi_active       atomic_read(&nmi_active)
-#endif /* Linux >= 2.6.19 */
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-#define CALL_LINUX_NMI         ({ rthal_linux_nmi_tick(regs); 1; })
-#define NMI_RETURN(code)       return
-static void rthal_nmi_watchdog_tick(struct pt_regs *regs)
-#else /* Linux >= 2.6.19 */
-#define CALL_LINUX_NMI         rthal_linux_nmi_tick(regs, reason)
-#define NMI_RETURN(code)       return (code)
-static int rthal_nmi_watchdog_tick(struct pt_regs *regs, unsigned reason)
-#endif /* Linux >= 2.6.19 */
-{
-       int cpu = rthal_processor_id();
-       rthal_nmi_wd_t *wd = &rthal_nmi_wds[cpu];
-       unsigned long long now;
-       u64 perfctr;
-
-       rdmsrl(wd->perfctr_msr, perfctr);
-
-       if (perfctr & wd->perfctr_checkmask)
-               /* No watchdog tick, let Linux handle it. */
-               NMI_RETURN(CALL_LINUX_NMI);
-
-       if (wd->flags & NMI_WD_ARMED)
-               rthal_nmi_emergency(regs);
-
-       now = rthal_rdtsc();
-
-       if ((long long)(now - wd->next_linux_check) >= 0) {
-
-               CALL_LINUX_NMI;
-
-               do {
-                       wd->next_linux_check += RTHAL_CPU_FREQ;
-               } while ((long long)(now - wd->next_linux_check) >= 0);
-       }
-
-       if (wd->flags & NMI_WD_P4) {
-               /*
-                * P4 quirks:
-                * - An overflown perfctr will assert its interrupt
-                *   until the OVF flag in its CCCR is cleared.
-                * - LVTPC is masked on interrupt and must be
-                *   unmasked by the LVTPC handler.
-                */
-               wrmsr(MSR_P4_IQ_CCCR0, wd->p4_cccr_val, 0);
-               apic_write(APIC_LVTPC, APIC_DM_NMI);
-       } else if (wd->flags & NMI_WD_P6_OR_LATER) {
-               /* P6 based Pentium M need to re-unmask
-                * the apic vector but it doesn't hurt
-                * other P6 variant.
-                * ArchPerfom/Core Duo also needs this */
-               apic_write(APIC_LVTPC, APIC_DM_NMI);
-       }
-
-       if (wd->flags & NMI_WD_31BITS)
-               wrmsr(wd->perfctr_msr, (u32)(now - wd->next_linux_check), 0);
-       else
-               wrmsrl(wd->perfctr_msr, now - wd->next_linux_check);
-
-       NMI_RETURN(1);
-}
-
-int rthal_nmi_request(void (*emergency) (struct pt_regs *))
-{
-       unsigned long long next_linux_check;
-       unsigned long perfctr_msr;
-       u64 perfctr_checkmask;
-       unsigned int wd_flags = 0;
-       unsigned int p4_cccr_val = 0;
-       int i;
-
-       if (!rthal_nmi_active || !nmi_watchdog_tick)
-               return -ENODEV;
-
-       if (rthal_linux_nmi_tick)
-               return -EBUSY;
-
-       switch (boot_cpu_data.x86_vendor) {
-       case X86_VENDOR_AMD:
-               perfctr_msr = MSR_K7_PERFCTR0;
-               perfctr_checkmask = 1ULL << 47;
-               break;
-       case X86_VENDOR_INTEL:
-               if (cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
-                       union cpuid10_eax eax;
-
-                       if (boot_cpu_data.x86 == 6 &&
-                           boot_cpu_data.x86_model == 14)
-                               perfctr_msr = MSR_ARCH_PERFMON_PERFCTR0;
-                       else
-                               perfctr_msr = MSR_ARCH_PERFMON_PERFCTR1;
-                       cpuid(10, &eax.full, &i, &i, &i);
-                       perfctr_checkmask = 1ULL << (eax.split.bit_width - 1);
-                       wd_flags = NMI_WD_P6_OR_LATER | NMI_WD_31BITS;
-               } else
-                       switch (boot_cpu_data.x86) {
-                       case 6:
-                               perfctr_msr = MSR_P6_PERFCTR0;
-                               perfctr_checkmask = 1ULL << 39;
-                               wd_flags = NMI_WD_P6_OR_LATER | NMI_WD_31BITS;
-                               break;
-                       case 15:
-                               perfctr_msr = MSR_P4_IQ_COUNTER0;
-                               perfctr_checkmask = 1ULL << 39;
-                               p4_cccr_val = P4_NMI_IQ_CCCR0;
-#ifdef CONFIG_SMP
-                               if (smp_num_siblings == 2)
-                                       p4_cccr_val |= P4_CCCR_OVF_PMI1;
-#endif
-                               break;
-                       default:
-                               return -ENODEV;
-                       }
-               break;
-       default:
-               return -ENODEV;
-       }
-
-       rthal_nmi_emergency = emergency;
-
-       next_linux_check = rthal_rdtsc() + RTHAL_CPU_FREQ;
-       for (i = 0; i < NR_CPUS; i++) {
-               rthal_nmi_wd_t *wd = &rthal_nmi_wds[i];
-
-               wd->flags = wd_flags;
-               wd->perfctr_msr = perfctr_msr;
-               wd->perfctr_checkmask = perfctr_checkmask;
-               wd->p4_cccr_val = p4_cccr_val;
-               wd->next_linux_check = next_linux_check;
-       }
-
-       rthal_linux_nmi_tick = nmi_watchdog_tick;
-       wmb();
-       nmi_watchdog_tick = &rthal_nmi_watchdog_tick;
-
-       return 0;
-}
-
-void rthal_nmi_release(void)
-{
-       rthal_nmi_wd_t *wd = &rthal_nmi_wds[rthal_processor_id()];
-       int i;
-
-       if (!rthal_linux_nmi_tick)
-               return;
-
-       if (wd->flags & NMI_WD_31BITS)
-               wrmsr(wd->perfctr_msr, (u32)(0 - RTHAL_CPU_FREQ), 0);
-       else
-               wrmsrl(wd->perfctr_msr, 0 - RTHAL_CPU_FREQ);
-       for (i = 0; i < NR_CPUS; i++)
-               rthal_nmi_wds[i].perfctr_msr = 0;
-       touch_nmi_watchdog();
-       wmb();
-       nmi_watchdog_tick = rthal_linux_nmi_tick;
-       rthal_linux_nmi_tick = NULL;
-}
-
-void rthal_nmi_arm(unsigned long delay)
-{
-       rthal_nmi_wd_t *wd = &rthal_nmi_wds[rthal_processor_id()];
-
-       if (!wd->perfctr_msr)
-               return;
-
-       /* If linux watchdog could tick now, make it tick now. */
-       if ((long long) (rthal_rdtsc() - wd->next_linux_check) >= 0) {
-               unsigned long flags;
-
-               /* Protect from an interrupt handler calling rthal_nmi_arm. */
-               rthal_local_irq_save(flags);
-               wd->flags &= ~NMI_WD_ARMED;
-               /*
-                * Our watchdog must be declared unarmed before we triger the
-                * Linux watchdog NMI, entering rthal_nmi_watchdog_tick.
-                */
-               wmb();
-               if (wd->flags & NMI_WD_31BITS)
-                       wrmsr(wd->perfctr_msr, (u32)-1, 0);
-               else
-                       wrmsrl(wd->perfctr_msr, -1);
-               asm("nop");
-               rthal_local_irq_restore(flags);
-       }
-
-       if (wd->flags & NMI_WD_31BITS)
-               wrmsr(wd->perfctr_msr, (u32)(0 - delay), 0);
-       else
-               wrmsrl(wd->perfctr_msr, 0 - delay);
-       /*
-        * New perfctr must have been written before we can declare the
-        * watchdog armed (avoid race with previously programmed value).
-        */
-       wmb();
-       wd->flags |= NMI_WD_ARMED;
-}
-
-void rthal_nmi_disarm(void)
-{
-       rthal_nmi_wds[rthal_processor_id()].flags &= ~NMI_WD_ARMED;
-}
-
-EXPORT_SYMBOL_GPL(rthal_nmi_request);
-EXPORT_SYMBOL_GPL(rthal_nmi_release);
-EXPORT_SYMBOL_GPL(rthal_nmi_arm);
-EXPORT_SYMBOL_GPL(rthal_nmi_disarm);
diff --git a/ksrc/nucleus/intr.c b/ksrc/nucleus/intr.c
index 43a6a63..4548380 100644
--- a/ksrc/nucleus/intr.c
+++ b/ksrc/nucleus/intr.c
@@ -101,8 +101,6 @@ void xnintr_clock_handler(void)
                &nkclock.stat[xnsched_cpu(sched)].account);
        xnstat_counter_inc(&nkclock.stat[xnsched_cpu(sched)].hits);
 
-       xnarch_announce_tick();
-
        trace_mark(xn_nucleus, irq_enter, "irq %u", XNARCH_TIMER_IRQ);
        trace_mark(xn_nucleus, tbase_tick, "base %s", nktbase.name);
 
diff --git a/ksrc/nucleus/pod.c b/ksrc/nucleus/pod.c
index 2ca83ff..d25120f 100644
--- a/ksrc/nucleus/pod.c
+++ b/ksrc/nucleus/pod.c
@@ -3289,43 +3289,6 @@ static struct xnvfile_regular apc_vfile = {
        .ops = &apc_vfile_ops,
 };
 
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-
-static int nmi_vfile_show(struct xnvfile_regular_iterator *it, void *data)
-{
-       xnvfile_printf(it, "%u\n", rthal_maxlat_us);
-
-       return 0;
-}
-
-static ssize_t nmi_vfile_store(struct xnvfile_input *input)
-{
-       ssize_t ret;
-       long val;
-
-       ret = xnvfile_get_integer(input, &val);
-       if (ret < 0)
-               return ret;
-
-       if ((int)val < 0)
-               return -EINVAL;
-
-       rthal_nmi_set_maxlat((unsigned int)val);
-
-       return ret;
-}
-
-static struct xnvfile_regular_ops nmi_vfile_ops = {
-       .show = nmi_vfile_show,
-       .store = nmi_vfile_store,
-};
-
-static struct xnvfile_regular nmi_vfile = {
-       .ops = &nmi_vfile_ops,
-};
-
-#endif /* CONFIG_XENO_HW_NMI_DEBUG_LATENCY */
-
 int __init xnpod_init_proc(void)
 {
        int ret;
@@ -3348,9 +3311,6 @@ int __init xnpod_init_proc(void)
        xnvfile_init_regular("version", &version_vfile, &nkvfroot);
        xnvfile_init_regular("faults", &faults_vfile, &nkvfroot);
        xnvfile_init_regular("apc", &apc_vfile, &nkvfroot);
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       xnvfile_init_regular("nmi_maxlat", &nmi_vfile, &nkvfroot);
-#endif
 #if XENO_DEBUG(XNLOCK)
        xnvfile_init_regular("lock", &lock_vfile, &nkvfroot);
 #endif /* XENO_DEBUG(XNLOCK) */
@@ -3363,9 +3323,6 @@ void xnpod_cleanup_proc(void)
 #if XENO_DEBUG(XNLOCK)
        xnvfile_destroy_regular(&lock_vfile);
 #endif /* XENO_DEBUG(XNLOCK) */
-#ifdef CONFIG_XENO_HW_NMI_DEBUG_LATENCY
-       xnvfile_destroy_regular(&nmi_vfile);
-#endif
        xnvfile_destroy_regular(&apc_vfile);
        xnvfile_destroy_regular(&faults_vfile);
        xnvfile_destroy_regular(&version_vfile);


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