Module: xenomai-forge Branch: master Commit: e085e3489e36011babb896eba403595475b8795a URL: http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=e085e3489e36011babb896eba403595475b8795a
Author: Philippe Gerum <[email protected]> Date: Fri Dec 30 12:56:59 2011 +0100 hal, nucleus: use refactored hard interrupt mask ops --- include/asm-arm/atomic.h | 4 ++-- include/asm-arm/bits/pod.h | 3 --- include/asm-generic/bits/pod.h | 4 ++-- include/asm-generic/ipipe/wrappers.h | 28 ++++++++++++++++++++++++++++ include/asm-nios2/atomic.h | 4 ++-- include/asm-sim/system.h | 2 +- include/asm-x86/bits/pod_64.h | 2 +- include/cobalt/nucleus/sched.h | 4 ++-- kernel/cobalt/arch/nios2/hal.c | 4 ++-- kernel/cobalt/arch/sh/hal.c | 4 ++-- kernel/cobalt/arch/x86/hal_32.c | 12 ++++++------ kernel/cobalt/nucleus/pod.c | 2 +- 12 files changed, 49 insertions(+), 24 deletions(-) diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h index b7b36a2..42479ff 100644 --- a/include/asm-arm/atomic.h +++ b/include/asm-arm/atomic.h @@ -51,9 +51,9 @@ static inline void atomic_set_mask(unsigned long mask, unsigned long *addr) { unsigned long flags; - local_irq_save_hw(flags); + hard_local_irq_save(flags); *addr |= mask; - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); } #endif /* arm <= armv5 */ diff --git a/include/asm-arm/bits/pod.h b/include/asm-arm/bits/pod.h index 2e4781a..4123ee7 100644 --- a/include/asm-arm/bits/pod.h +++ b/include/asm-arm/bits/pod.h @@ -101,11 +101,8 @@ static inline void xnarch_init_thread(xnarchtcb_t * tcb, int imask, struct xnthread *thread, char *name) { - unsigned long flags; struct cpu_context_save *regs; - local_save_flags_hw(flags); - regs = &tcb->ti.cpu_context; memset(regs, 0, sizeof(*regs)); regs->pc = (unsigned long)&rthal_thread_trampoline; diff --git a/include/asm-generic/bits/pod.h b/include/asm-generic/bits/pod.h index 2af7303..6158667 100644 --- a/include/asm-generic/bits/pod.h +++ b/include/asm-generic/bits/pod.h @@ -174,10 +174,10 @@ static inline void xnarch_notify_halt(void) (ipipe_irq_handler_t)xnarch_finalize_cpu, NULL, NULL); - local_irq_save_hw(flags); + hard_local_irq_save(flags); cpu_clear(ipipe_processor_id(), other_cpus); ipipe_send_ipi(IPIPE_SERVICE_IPI2, other_cpus); - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); for(cpu=0; cpu < nr_cpus-1; ++cpu) down(&xnarch_finalize_sync); diff --git a/include/asm-generic/ipipe/wrappers.h b/include/asm-generic/ipipe/wrappers.h index e1e90f7..57ae86b 100644 --- a/include/asm-generic/ipipe/wrappers.h +++ b/include/asm-generic/ipipe/wrappers.h @@ -295,6 +295,34 @@ static inline void ipipe_end_irq(unsigned int irq) desc->ipipe_end(irq, desc); } +static inline int hard_irqs_disabled(void) +{ + return irqs_disabled_hw(); +} + +static inline void hard_local_irq_disable(void) +{ + local_irq_disable_hw(); +} + +static inline void hard_local_irq_enable(void) +{ + local_irq_enable_hw(); +} + +#define hard_local_irq_save(flags) local_irq_save_hw(flags) + +static inline void hard_local_irq_restore(unsigned long flags) +{ + local_irq_restore_hw(flags); +} + +#define hard_smp_local_irq_save(flags) local_irq_save_hw_smp(flags) +#define hard_smp_local_irq_restore(flags) local_irq_restore_hw_smp(flags) + +#define hard_cond_local_irq_save(flags) local_irq_save_hw_cond(flags) +#define hard_cond_local_irq_restore(flags) local_irq_restore_hw_cond(flags) + #else /* !CONFIG_XENO_LEGACY_IPIPE */ static inline void alloc_ptd_key(void) { } diff --git a/include/asm-nios2/atomic.h b/include/asm-nios2/atomic.h index d46ef70..41cb95b 100644 --- a/include/asm-nios2/atomic.h +++ b/include/asm-nios2/atomic.h @@ -28,9 +28,9 @@ static inline void atomic_set_mask(unsigned long mask, unsigned long *addr) { unsigned long flags; - local_irq_save_hw(flags); + hard_local_irq_save(flags); *addr |= mask; - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); } #endif /* !__KERNEL__ */ diff --git a/include/asm-sim/system.h b/include/asm-sim/system.h index b5beec1..c7b4839 100644 --- a/include/asm-sim/system.h +++ b/include/asm-sim/system.h @@ -67,7 +67,7 @@ typedef int spl_t; #define splexit(x) mvm_set_irqmask(x) #define splnone() mvm_set_irqmask(0) #define spltest() (mvm_get_irqmask() != 0) -#define irqs_disabled_hw() spltest() +#define hard_irqs_disabled() spltest() struct xnlock { }; diff --git a/include/asm-x86/bits/pod_64.h b/include/asm-x86/bits/pod_64.h index 780dbd6..29c9a6d 100644 --- a/include/asm-x86/bits/pod_64.h +++ b/include/asm-x86/bits/pod_64.h @@ -119,7 +119,7 @@ static inline void xnarch_init_thread(xnarchtcb_t *tcb, /* Prepare the bootstrap stack. */ - local_save_flags_hw(flags); + hard_local_save_flags(flags); rsp = (unsigned long *)((unsigned long)tcb->stackbase + tcb->stacksize - sizeof(struct xnarch_x8664_initstack) - 8); diff --git a/include/cobalt/nucleus/sched.h b/include/cobalt/nucleus/sched.h index 84864d2..29ed70d 100644 --- a/include/cobalt/nucleus/sched.h +++ b/include/cobalt/nucleus/sched.h @@ -206,11 +206,11 @@ int xnsched_maybe_resched_after_unlocked_switch(struct xnsched *sched) #ifdef CONFIG_SMP #define xnsched_finish_unlocked_switch(__sched__) \ - ({ XENO_BUGON(NUCLEUS, !irqs_disabled_hw()); \ + ({ XENO_BUGON(NUCLEUS, !hard_irqs_disabled()); \ xnpod_current_sched(); }) #else /* !CONFIG_SMP */ #define xnsched_finish_unlocked_switch(__sched__) \ - ({ XENO_BUGON(NUCLEUS, !irqs_disabled_hw()); \ + ({ XENO_BUGON(NUCLEUS, !hard_irqs_disabled()); \ (__sched__); }) #endif /* !CONFIG_SMP */ diff --git a/kernel/cobalt/arch/nios2/hal.c b/kernel/cobalt/arch/nios2/hal.c index 215d4f5..2afcdde 100644 --- a/kernel/cobalt/arch/nios2/hal.c +++ b/kernel/cobalt/arch/nios2/hal.c @@ -69,7 +69,7 @@ unsigned long rthal_timer_calibrate(void) u32 d; int n; - local_irq_save_hw(flags); + hard_local_irq_save(flags); ipipe_read_tsc(t); @@ -78,7 +78,7 @@ unsigned long rthal_timer_calibrate(void) for (n = 1; n < 100; n++) ipipe_read_tsc(v); - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); d = (u32)(v - t); freq = rthal_get_clockfreq(); diff --git a/kernel/cobalt/arch/sh/hal.c b/kernel/cobalt/arch/sh/hal.c index 25eb126..01d295d 100644 --- a/kernel/cobalt/arch/sh/hal.c +++ b/kernel/cobalt/arch/sh/hal.c @@ -107,7 +107,7 @@ unsigned long rthal_timer_calibrate(void) u32 d; int n; - local_irq_save_hw(flags); + hard_local_irq_save(flags); ipipe_read_tsc(t); @@ -116,7 +116,7 @@ unsigned long rthal_timer_calibrate(void) for (n = 1; n < 100; n++) ipipe_read_tsc(v); - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); d = (u32)(v - t); freq = rthal_get_clockfreq(); diff --git a/kernel/cobalt/arch/x86/hal_32.c b/kernel/cobalt/arch/x86/hal_32.c index db8f628..6202aaa 100644 --- a/kernel/cobalt/arch/x86/hal_32.c +++ b/kernel/cobalt/arch/x86/hal_32.c @@ -89,7 +89,7 @@ unsigned long rthal_timer_calibrate(void) rthal_time_t t, dt; int i, count; - local_irq_save_hw(flags); + hard_local_irq_save(flags); /* Read the current latch value, whatever the current mode is. */ @@ -115,7 +115,7 @@ unsigned long rthal_timer_calibrate(void) dt = rthal_rdtsc() - t; - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); /* * Reset the max trace, since it contains the calibration time @@ -131,7 +131,7 @@ static void rthal_timer_set_oneshot(void) unsigned long flags; int count; - local_irq_save_hw(flags); + hard_local_irq_save(flags); /* * We should be running in rate generator mode (M2) on entry, * so read the current latch value, in order to roughly @@ -153,18 +153,18 @@ static void rthal_timer_set_oneshot(void) outb_p(0x38, PIT_MODE); outb(count & 0xff, PIT_CH0); outb(count >> 8, PIT_CH0); - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); } static void rthal_timer_set_periodic(void) { unsigned long flags; - local_irq_save_hw(flags); + hard_local_irq_save(flags); outb_p(0x34, PIT_MODE); outb(LATCH & 0xff, PIT_CH0); outb(LATCH >> 8, PIT_CH0); - local_irq_restore_hw(flags); + hard_local_irq_restore(flags); } int rthal_timer_request(void (*tick_handler)(void), diff --git a/kernel/cobalt/nucleus/pod.c b/kernel/cobalt/nucleus/pod.c index 32c155e..8b76d5a 100644 --- a/kernel/cobalt/nucleus/pod.c +++ b/kernel/cobalt/nucleus/pod.c @@ -2230,7 +2230,7 @@ reschedule: * handler that hit before we call xnpod_schedule in * xnpod_suspend_thread when relaxing a thread. */ - XENO_BUGON(NUCLEUS, !irqs_disabled_hw()); + XENO_BUGON(NUCLEUS, !hard_irqs_disabled()); return; #endif /* !__XENO_SIM__ */ } _______________________________________________ Xenomai-git mailing list [email protected] https://mail.gna.org/listinfo/xenomai-git
