Module: xenomai-gch
Branch: for-forge
Commit: 9e1cf25abf3ac2298a61c1f03b65b8feb718a70b
URL:
http://git.xenomai.org/?p=xenomai-gch.git;a=commit;h=9e1cf25abf3ac2298a61c1f03b65b8feb718a70b
Author: Gilles Chanteperdrix <gilles.chanteperd...@xenomai.org>
Date: Wed Mar 14 13:10:30 2012 +0100
hal: adapt to refactored ipipe core timers
---
include/asm-arm/hal.h | 59 +---------------
include/asm-generic/bits/pod.h | 2 +-
include/asm-generic/wrappers.h | 2 +-
kernel/cobalt/arch/arm/hal.c | 149 ++++-----------------------------------
4 files changed, 22 insertions(+), 190 deletions(-)
diff --git a/include/asm-arm/hal.h b/include/asm-arm/hal.h
index f4fef47..4473058 100644
--- a/include/asm-arm/hal.h
+++ b/include/asm-arm/hal.h
@@ -29,6 +29,7 @@
#ifndef _XENO_ASM_ARM_HAL_H
#define _XENO_ASM_ARM_HAL_H
+#include <linux/ipipe_timer.h>
#include <asm-generic/xenomai/hal.h> /* Read the generic bits. */
#include <asm/byteorder.h>
@@ -38,57 +39,8 @@
#include <asm/vfp.h>
#endif /* CONFIG_VFP */
-#if defined(CONFIG_ARCH_AT91)
-#include <linux/stringify.h>
-#define RTHAL_TIMER_DEVICE "at91_tc" __stringify(CONFIG_IPIPE_AT91_TC)
-#define RTHAL_CLOCK_DEVICE "at91_tc" __stringify(CONFIG_IPIPE_AT91_TC)
-#elif defined(CONFIG_ARCH_IMX)
-#define RTHAL_TIMER_DEVICE "imx_timer1"
-#define RTHAL_CLOCK_DEVICE "imx_timer1"
-#elif defined(CONFIG_ARCH_IMX21)
-#define RTHAL_TIMER_DEVICE "TCMP"
-#define RTHAL_CLOCK_DEVICE "TCN"
-#elif defined(CONFIG_ARCH_INTEGRATOR)
-#define RTHAL_TIMER_DEVICE "TIMER1"
-#define RTHAL_CLOCK_DEVICE "TIMER1"
-#elif defined(CONFIG_ARCH_IXP4XX)
-#define RTHAL_TIMER_DEVICE "ixp4xx timer1"
-#define RTHAL_CLOCK_DEVICE "OSTS"
-#elif defined(CONFIG_ARCH_MXC) && !defined(CONFIG_SMP)
-#define RTHAL_TIMER_DEVICE "mxc_timer1"
-#define RTHAL_CLOCK_DEVICE "mxc_timer1"
-#elif defined(CONFIG_ARCH_OMAP3)
-#ifdef CONFIG_ARCH_OMAP4
-#error "xenomai does not support multi-omap configuration"
-#endif /* multi-omap */
-#define RTHAL_TIMER_DEVICE "gp timer"
-#define RTHAL_CLOCK_DEVICE "gp timer"
-#elif defined(CONFIG_ARCH_OMAP4)
-#ifdef CONFIG_ARCH_OMAP3
-#error "xenomai does not support multi-omap configuration"
-#endif /* multi-omap */
-#define RTHAL_TIMER_DEVICE \
- num_online_cpus() == 1 ? "gp timer" : "local_timer"
-#define RTHAL_CLOCK_DEVICE \
- num_online_cpus() == 1 ? "gp timer" : "global_timer"
-#elif defined(CONFIG_PLAT_ORION)
-#define RTHAL_TIMER_DEVICE "orion_tick"
-#define RTHAL_CLOCK_DEVICE "orion_clocksource"
-#elif defined(CONFIG_ARCH_PXA)
-#define RTHAL_TIMER_DEVICE "osmr0"
-#define RTHAL_CLOCK_DEVICE "oscr0"
-#elif defined(CONFIG_ARCH_S3C2410)
-#define RTHAL_TIMER_DEVICE "TCNTB4"
-#define RTHAL_CLOCK_DEVICE "TCNTO3"
-#elif defined(CONFIG_ARCH_SA1100)
-#define RTHAL_TIMER_DEVICE "osmr0"
-#define RTHAL_CLOCK_DEVICE "oscr0"
-#elif defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_TWD)
-#define RTHAL_TIMER_DEVICE "local_timer"
-#define RTHAL_CLOCK_DEVICE "global_timer"
-#else
-#error "Unsupported ARM machine"
-#endif /* CONFIG_ARCH_SA1100 */
+#define RTHAL_TIMER_DEVICE (ipipe_timer_name())
+#define RTHAL_CLOCK_DEVICE "ipipe_tsc"
#define RTHAL_HOST_TICK_IRQ RTHAL_TIMER_IRQ
@@ -173,10 +125,7 @@ static inline struct task_struct
*rthal_current_host_task(int cpuid)
static inline void rthal_timer_program_shot(unsigned long delay)
{
- if (delay == 0)
- ipipe_post_irq_head(RTHAL_TIMER_IRQ);
- else
- __ipipe_mach_set_dec(delay);
+ ipipe_timer_set(delay);
}
/* Private interface -- Internal use only */
diff --git a/include/asm-generic/bits/pod.h b/include/asm-generic/bits/pod.h
index ded4d52..a5d13a6 100644
--- a/include/asm-generic/bits/pod.h
+++ b/include/asm-generic/bits/pod.h
@@ -26,7 +26,7 @@
#endif
#include <linux/tick.h>
-#include <linux/ipipe_tickdev.h>
+#include <linux/ipipe_timer.h>
/*!
* @internal
diff --git a/include/asm-generic/wrappers.h b/include/asm-generic/wrappers.h
index 868414b..3208531 100644
--- a/include/asm-generic/wrappers.h
+++ b/include/asm-generic/wrappers.h
@@ -28,7 +28,7 @@
#include <linux/version.h>
#include <linux/module.h>
#include <linux/slab.h>
-#include <linux/ipipe_tickdev.h>
+#include <linux/ipipe_timer.h>
#include <asm/io.h>
#include <linux/pid.h>
diff --git a/kernel/cobalt/arch/arm/hal.c b/kernel/cobalt/arch/arm/hal.c
index 8ed802c..5d9db68 100644
--- a/kernel/cobalt/arch/arm/hal.c
+++ b/kernel/cobalt/arch/arm/hal.c
@@ -30,7 +30,7 @@
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/console.h>
-#include <linux/ipipe_tickdev.h>
+#include <linux/ipipe_timer.h>
#include <asm/system.h>
#include <asm/hardirq.h>
#include <asm/irq.h>
@@ -50,43 +50,6 @@ rthal_u32frac_t rthal_tsc_to_timer;
#define RTHAL_CALIBRATE_LOOPS 10
-enum rthal_ktimer_mode rthal_ktimer_saved_mode;
-
-#define RTHAL_SET_ONESHOT_XENOMAI 1
-#define RTHAL_SET_ONESHOT_LINUX 2
-#define RTHAL_SET_PERIODIC 3
-
-static inline void steal_timer(int stolen)
-{
- /*
- * Some platform-specific I-pipe bits may want to know whether
- * non-vanilla kernel code is currently fiddling with the
- * timer chip; setting this flag on tells them so.
- */
- __ipipe_mach_timerstolen = stolen;
-}
-
-static inline void force_oneshot_hw_mode(void)
-{
- /*
- * Program next tick ahead at a sensible date. We expect
- * __ipipe_mach_set_dec() to switch off any auto-reload mode
- * if that makes sense for the hardware.
- */
- __ipipe_mach_set_dec(__ipipe_mach_ticks_per_jiffy);
-}
-
-static inline void restore_normal_hw_mode(void)
-{
- steal_timer(0);
- /*
- * Ask the I-pipe to reset the normal timer operating mode at
- * hardware level, which should match the current logical mode
- * for the active clockevent.
- */
- __ipipe_mach_release_timer();
-}
-
unsigned long rthal_timer_calibrate(void)
{
unsigned long long start, end, sum = 0, sum_sq = 0;
@@ -97,16 +60,12 @@ unsigned long rthal_timer_calibrate(void)
int i, j;
flags = ipipe_critical_enter(NULL);
-
/*
* Hw interrupts off, other CPUs quiesced, no migration
* possible. We can now fiddle with the timer chip (per-cpu
* local or global, rthal_timer_program_shot() will handle
* this transparently via the I-pipe).
*/
- steal_timer(1);
- force_oneshot_hw_mode();
-
ipipe_read_tsc(start);
barrier();
ipipe_read_tsc(end);
@@ -129,9 +88,6 @@ unsigned long rthal_timer_calibrate(void)
}
}
}
-
- restore_normal_hw_mode();
-
ipipe_critical_exit(flags);
/* Use average + standard deviation as timer programming latency. */
@@ -142,61 +98,6 @@ unsigned long rthal_timer_calibrate(void)
return result;
}
-#ifdef CONFIG_SMP
-static void critical_sync(void)
-{
- switch (sync_op) {
- case RTHAL_SET_ONESHOT_XENOMAI:
- force_oneshot_hw_mode();
- steal_timer(1);
- break;
-
- case RTHAL_SET_ONESHOT_LINUX:
- force_oneshot_hw_mode();
- steal_timer(0);
- /* We need to keep the timing cycle alive for the kernel. */
- ipipe_raise_irq(RTHAL_TIMER_IRQ);
- break;
-
- case RTHAL_SET_PERIODIC:
- restore_normal_hw_mode();
- break;
- }
-}
-#else /* CONFIG_SMP */
-#define critical_sync NULL
-#endif /* !CONFIG_SMP */
-
-static void rthal_timer_set_oneshot(int rt_mode)
-{
- unsigned long flags;
-
- flags = ipipe_critical_enter(critical_sync);
-
- if (rt_mode) {
- sync_op = RTHAL_SET_ONESHOT_XENOMAI;
- force_oneshot_hw_mode();
- steal_timer(1);
- } else {
- sync_op = RTHAL_SET_ONESHOT_LINUX;
- force_oneshot_hw_mode();
- steal_timer(0);
- /* We need to keep the timing cycle alive for the kernel. */
- ipipe_raise_irq(RTHAL_TIMER_IRQ);
- }
- ipipe_critical_exit(flags);
-}
-
-static void rthal_timer_set_periodic(void)
-{
- unsigned long flags;
-
- flags = ipipe_critical_enter(critical_sync);
- sync_op = RTHAL_SET_PERIODIC;
- restore_normal_hw_mode();
- ipipe_critical_exit(flags);
-}
-
static int cpu_timers_requested;
int rthal_timer_request(
@@ -213,8 +114,8 @@ int rthal_timer_request(
if (rthal_timerfreq_arg == 0)
tmfreq = &rthal_archdata.timer_freq;
- ret = ipipe_request_tickdev(RTHAL_TIMER_DEVICE, mode_emul, tick_emul,
cpu,
- tmfreq);
+ ret = ipipe_timer_start(tick_handler,
+ mode_emul, tick_emul, cpu, tmfreq);
switch (ret) {
case CLOCK_EVT_MODE_PERIODIC:
/* oneshot tick emulation callback won't be used, ask
@@ -240,8 +141,6 @@ int rthal_timer_request(
return ret;
}
- rthal_ktimer_saved_mode = ret;
-
/*
* The rest of the initialization should only be performed
* once by a single CPU.
@@ -249,13 +148,6 @@ int rthal_timer_request(
if (cpu_timers_requested++ > 0)
goto out;
- ret = ipipe_request_irq(&rthal_archdata.domain,
- RTHAL_TIMER_IRQ,
- (ipipe_irq_handler_t)tick_handler,
- NULL, NULL);
- if (ret)
- return ret;
-
#ifdef CONFIG_SMP
ret = ipipe_request_irq(&rthal_archdata.domain,
RTHAL_TIMER_IPI,
@@ -265,40 +157,20 @@ int rthal_timer_request(
return ret;
#endif /* CONFIG_SMP */
- rthal_timer_set_oneshot(1);
out:
return tickval;
}
void rthal_timer_release(int cpu)
{
- ipipe_release_tickdev(cpu);
+ ipipe_timer_stop(cpu);
if (--cpu_timers_requested > 0)
return;
- ipipe_free_irq(&rthal_archdata.domain, RTHAL_TIMER_IRQ);
#ifdef CONFIG_SMP
ipipe_free_irq(&rthal_archdata.domain, RTHAL_TIMER_IPI);
#endif /* CONFIG_SMP */
-
- if (rthal_ktimer_saved_mode == KTIMER_MODE_PERIODIC)
- rthal_timer_set_periodic();
- else if (rthal_ktimer_saved_mode == KTIMER_MODE_ONESHOT)
- rthal_timer_set_oneshot(0);
-}
-
-void rthal_timer_notify_switch(enum clock_event_mode mode,
- struct clock_event_device *cdev)
-{
- if (ipipe_processor_id() > 0)
- /*
- * We assume all CPUs switch the same way, so we only
- * track mode switches from the boot CPU.
- */
- return;
-
- rthal_ktimer_saved_mode = mode;
}
void __rthal_arm_fault_range(struct vm_area_struct *vma)
@@ -314,8 +186,19 @@ void __rthal_arm_fault_range(struct vm_area_struct *vma)
}
}
+void rthal_timer_notify_switch(enum clock_event_mode mode,
+ struct clock_event_device *cdev)
+{
+}
+
int rthal_arch_init(void)
{
+ int rc;
+
+ rc = ipipe_timers_request();
+ if (rc < 0)
+ return rc;
+
if (rthal_timerfreq_arg == 0)
rthal_timerfreq_arg = rthal_get_timerfreq();
@@ -330,6 +213,6 @@ int rthal_arch_init(void)
void rthal_arch_cleanup(void)
{
- /* Nothing to cleanup so far. */
+ ipipe_timers_release();
printk(KERN_INFO "Xenomai: hal/arm stopped.\n");
}
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