Module: xenomai-2.6
Branch: master
Commit: 5d808812cfe1352bec3a8f85b8a09c0469b60be6
URL:    
http://git.xenomai.org/?p=xenomai-2.6.git;a=commit;h=5d808812cfe1352bec3a8f85b8a09c0469b60be6

Author: Gilles Chanteperdrix <gilles.chanteperd...@xenomai.org>
Date:   Sat Apr 28 19:21:33 2012 +0200

hal/blackfin: fixup for refactored timers

---

 include/asm-blackfin/bits/pod.h |   18 +++---
 include/asm-blackfin/hal.h      |   12 ++++
 ksrc/arch/arm/hal.c             |    3 +-
 ksrc/arch/blackfin/hal.c        |  129 ++++++++++++++++++++++++++++++++-------
 4 files changed, 129 insertions(+), 33 deletions(-)

diff --git a/include/asm-blackfin/bits/pod.h b/include/asm-blackfin/bits/pod.h
index 2ad4584..806dfa5 100644
--- a/include/asm-blackfin/bits/pod.h
+++ b/include/asm-blackfin/bits/pod.h
@@ -26,14 +26,11 @@ void xnpod_welcome_thread(struct xnthread *, int);
 
 void xnpod_delete_thread(struct xnthread *);
 
-#ifdef CONFIG_GENERIC_CLOCKEVENTS
-static inline int xnarch_start_timer(void (*tick_handler)(void), int cpu)
-{
-       return rthal_timer_request(tick_handler,
-                                  xnarch_switch_htick_mode, 
xnarch_next_htick_shot,
-                                  cpu);
-}
-#else
+#ifndef CONFIG_GENERIC_CLOCKEVENTS
+#define xnarch_switch_htick_mode NULL
+#define xnarch_next_htick_shot NULL
+#endif /* CONFIG_GENERIC_CLOCKEVENTS */
+
 /*
  * When GENERIC_CLOCKEVENTS are not available, the I-pipe frees the
  * Blackfin core timer for us, therefore we don't need any host tick
@@ -42,9 +39,10 @@ static inline int xnarch_start_timer(void 
(*tick_handler)(void), int cpu)
  */
 static inline int xnarch_start_timer(void (*tick_handler)(void), int cpu)
 {
-       return rthal_timer_request(tick_handler, cpu);
+       return rthal_timer_request(tick_handler,
+                                  xnarch_switch_htick_mode, 
xnarch_next_htick_shot,
+                                  cpu);
 }
-#endif
 
 #define xnarch_stop_timer(cpu) rthal_timer_release(cpu)
 
diff --git a/include/asm-blackfin/hal.h b/include/asm-blackfin/hal.h
index 6dd1297..b630afd 100644
--- a/include/asm-blackfin/hal.h
+++ b/include/asm-blackfin/hal.h
@@ -29,7 +29,11 @@
 #include <asm-generic/xenomai/hal.h>   /* Read the generic bits. */
 #include <asm/div64.h>
 
+#ifdef CONFIG_IPIPE_CORE
+#define RTHAL_TIMER_DEVICE     (ipipe_timer_name())
+#else /* !CONFIG_IPIPE_CORE */
 #define RTHAL_TIMER_DEVICE     "coretmr"
+#endif /* !CONFIG_IPIPE_CORE */
 #define RTHAL_CLOCK_DEVICE     "cyclectr"
 
 typedef unsigned long long rthal_time_t;
@@ -46,7 +50,11 @@ static inline __attribute_const__ unsigned long 
ffnz(unsigned long ul)
 #include <asm/processor.h>
 #include <asm/xenomai/atomic.h>
 
+#ifdef CONFIG_IPIPE_CORE
+#define RTHAL_TIMER_IRQ                __ipipe_hrtimer_irq
+#else /* !CONFIG_IPIPE_CORE */
 #define RTHAL_TIMER_IRQ                IRQ_CORETMR
+#endif /* !CONFIG_IPIPE_CORE */
 /* The NMI watchdog timer is clocked by the system clock. */
 #define RTHAL_NMICLK_FREQ      get_sclk()
 
@@ -62,6 +70,9 @@ static inline unsigned long long rthal_rdtsc(void)
 
 static inline void rthal_timer_program_shot(unsigned long delay)
 {
+#ifdef CONFIG_IPIPE_CORE
+       ipipe_timer_set(delay);
+#else /* !CONFIG_IPIPE_CORE */
        if (delay < 2)
                rthal_schedule_irq_head(RTHAL_TIMER_IRQ);
        else {
@@ -71,6 +82,7 @@ static inline void rthal_timer_program_shot(unsigned long 
delay)
                CSYNC();
                bfin_write_TCNTL(TMPWR | TMREN);
        }
+#endif /* !CONFIG_IPIPE_CORE */
 }
 
     /* Private interface -- Internal use only */
diff --git a/ksrc/arch/arm/hal.c b/ksrc/arch/arm/hal.c
index 78742fc..159e889 100644
--- a/ksrc/arch/arm/hal.c
+++ b/ksrc/arch/arm/hal.c
@@ -258,7 +258,8 @@ int rthal_timer_request(
        unsigned long dummy, *tmfreq = &dummy;
        int tickval, ret;
 
-       ret = rthal_tickdev_request(tick_handler, mode_emul, tick_emul, cpu, 
tmfreq);
+       ret = rthal_tickdev_request(tick_handler,
+                                   mode_emul, tick_emul, cpu, tmfreq);
        switch (ret) {
        case CLOCK_EVT_MODE_PERIODIC:
                /* oneshot tick emulation callback won't be used, ask
diff --git a/ksrc/arch/blackfin/hal.c b/ksrc/arch/blackfin/hal.c
index 555c304..a50d92d 100644
--- a/ksrc/arch/blackfin/hal.c
+++ b/ksrc/arch/blackfin/hal.c
@@ -50,6 +50,74 @@ static struct {
 
 enum rthal_ktimer_mode rthal_ktimer_saved_mode;
 
+#ifdef CONFIG_IPIPE_CORE
+
+#define rthal_tickdev_select() \
+       ipipe_timers_request()
+
+#define rthal_tickdev_unselect() \
+       ipipe_timers_release()
+
+static inline
+int rthal_timer_request(void (*tick_handler)(void),
+                         void (*mode_emul)(enum clock_event_mode mode,
+                                           struct clock_event_device *cdev),
+                         int (*tick_emul)(unsigned long delay,
+                                          struct clock_event_device *cdev),
+                         int cpu)
+{
+       int ret, tickval;
+
+       ret = ipipe_timer_start(tick_handler, mode_emul, tick_emul, cpu);
+
+       switch (ret) {
+#ifdef CONFIG_GENERIC_CLOCKEVENTS
+       case CLOCK_EVT_MODE_PERIODIC:
+               /*
+                * Oneshot tick emulation callback won't be used, ask
+                * the caller to start an internal timer for emulating
+                * a periodic tick.
+                */
+               tickval = 1000000000UL / HZ;
+               break;
+
+       case CLOCK_EVT_MODE_ONESHOT:
+               /* Oneshot tick emulation */
+               tickval = 1;
+               break;
+
+       case CLOCK_EVT_MODE_UNUSED:
+               /* We don't need to emulate the tick at all. */
+               tickval = 0;
+               break;
+
+       case CLOCK_EVT_MODE_SHUTDOWN:
+               return -ENODEV;
+#else /* !CONFIG_GENERIC_CLOCKEVENTS */
+       case 0:
+               /* We don't need to emulate the tick at all. */
+               tickval = 0;
+               break;
+#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
+
+       default:
+               return ret;
+       }
+
+       rthal_ktimer_saved_mode = ret;
+
+       return tickval;
+}
+
+static inline void rthal_timer_release(int cpu)
+{
+       ipipe_timer_stop(cpu);
+}
+
+#else /* !I-pipe core */
+
+static int cpu_timers_requested;
+
 #define RTHAL_SET_ONESHOT_XENOMAI      1
 #define RTHAL_SET_ONESHOT_LINUX                2
 #define RTHAL_SET_PERIODIC             3
@@ -116,7 +184,9 @@ static void rthal_timer_set_periodic(void)
        rthal_critical_exit(flags);
 }
 
-static int cpu_timers_requested;
+#define rthal_tickdev_select() (0)
+
+#define rthal_tickdev_unselect() do { } while (0)
 
 #ifdef CONFIG_GENERIC_CLOCKEVENTS
 
@@ -131,11 +201,8 @@ int rthal_timer_request(
        unsigned long dummy, *tmfreq = &dummy;
        int tickval, err, res;
 
-       if (rthal_timerfreq_arg == 0)
-               tmfreq = &rthal_tunables.timer_freq;
-
-       res = ipipe_request_tickdev("bfin_core_timer", mode_emul, tick_emul, 
cpu,
-                                   tmfreq);
+       res = ipipe_tickdev_request("bfin_core_timer", tick_handler,
+                                   mode_emul, tick_emul, cpu, tmfreq);
        switch (res) {
        case CLOCK_EVT_MODE_PERIODIC:
                /* Oneshot tick emulation callback won't be used, ask
@@ -205,21 +272,6 @@ void rthal_timer_release(int cpu)
                rthal_irq_disable(RTHAL_TIMER_IRQ);
 }
 
-void rthal_timer_notify_switch(enum clock_event_mode mode,
-                              struct clock_event_device *cdev)
-{
-       if (rthal_processor_id() > 0)
-               /*
-                * We assume all CPUs switch the same way, so we only
-                * track mode switches from the boot CPU.
-                */
-               return;
-
-       rthal_ktimer_saved_mode = mode;
-}
-
-EXPORT_SYMBOL_GPL(rthal_timer_notify_switch);
-
 #else /* !CONFIG_GENERIC_CLOCKEVENTS */
 /*
  * We never override the system tick when the generic clock event
@@ -227,7 +279,13 @@ EXPORT_SYMBOL_GPL(rthal_timer_notify_switch);
  * timer exclusively available to us in such case, unconditionally
  * moving the kernel tick source to GPTMR0.
  */
-int rthal_timer_request(void (*tick_handler) (void), int cpu)
+int rthal_timer_request(
+       void (*tick_handler)(void),
+       void (*mode_emul)(enum clock_event_mode mode,
+                         struct clock_event_device *cdev),
+       int (*tick_emul)(unsigned long delay,
+                        struct clock_event_device *cdev),
+       int cpu)
 {
        int err;
 
@@ -263,6 +321,25 @@ void rthal_timer_release(int cpu)
 
 #endif /* !CONFIG_GENERIC_CLOCKEVENTS */
 
+#endif /* !I-pipe core */
+
+#ifdef CONFIG_GENERIC_CLOCKEVENTS
+void rthal_timer_notify_switch(enum clock_event_mode mode,
+                              struct clock_event_device *cdev)
+{
+       if (rthal_processor_id() > 0)
+               /*
+                * We assume all CPUs switch the same way, so we only
+                * track mode switches from the boot CPU.
+                */
+               return;
+
+       rthal_ktimer_saved_mode = mode;
+}
+
+EXPORT_SYMBOL_GPL(rthal_timer_notify_switch);
+#endif /* CONFIG_GENERIC_CLOCKEVENTS */
+
 unsigned long rthal_timer_calibrate(void)
 {
        return (1000000000 / RTHAL_CPU_FREQ) * 100;     /* 100 CPU cycles -- 
FIXME */
@@ -371,9 +448,16 @@ RTHAL_DECLARE_DOMAIN(rthal_domain_entry);
 
 int rthal_arch_init(void)
 {
+       int ret = rthal_tickdev_select();
+       if (ret < 0)
+               return ret;
+
        if (rthal_cpufreq_arg == 0)
                rthal_cpufreq_arg = rthal_get_cpufreq();
 
+       if (rthal_timerfreq_arg == 0)
+               rthal_timerfreq_arg = rthal_get_timerfreq();
+
        if (rthal_clockfreq_arg == 0)
                rthal_clockfreq_arg = rthal_get_clockfreq();
 
@@ -387,6 +471,7 @@ int rthal_arch_init(void)
 
 void rthal_arch_cleanup(void)
 {
+       rthal_tickdev_unselect();
        printk(KERN_INFO "Xenomai: hal/blackfin stopped.\n");
 }
 


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