Module: xenomai-forge
Branch: master
Commit: 70b9fdabce78f3734a32a33e49f7d16fc52fb180
URL:    
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=70b9fdabce78f3734a32a33e49f7d16fc52fb180

Author: Gilles Chanteperdrix <gilles.chanteperd...@xenomai.org>
Date:   Fri Aug 10 21:55:41 2012 +0200

cobalt/arm: fix assembly code for thumb

---

 kernel/cobalt/arch/arm/switch.S |   83 +++++++++++++++++++++------------------
 1 files changed, 45 insertions(+), 38 deletions(-)

diff --git a/kernel/cobalt/arch/arm/switch.S b/kernel/cobalt/arch/arm/switch.S
index 83f4746..003c05f 100644
--- a/kernel/cobalt/arch/arm/switch.S
+++ b/kernel/cobalt/arch/arm/switch.S
@@ -83,39 +83,40 @@
  * r0 = pointer to union vfp_state, r1 = fpexc
  */
 ENTRY(rthal_vfp_save)
-    VFPFSTMIA  r0, r2                  @ save the working registers
-    VFPFMRX    r2, FPSCR               @ current status
-    tst                r1, #FPEXC_EX           @ is there additional state to 
save?
-    beq 1f
-    VFPFMRX    r3, FPINST              @ FPINST (only if FPEXC.EX is set)
-    tst                r1, #FPEXC_FP2V         @ is there an FPINST2 to read?
-    beq 1f
-    VFPFMRX    r12, FPINST2    @ FPINST2 if needed (and present)
+       VFPFSTMIA       r0, r2          @ save the working registers
+       VFPFMRX         r2, FPSCR       @ current status
+       tst             r1, #FPEXC_EX   @ is there additional state to save?
+       beq             1f
+       VFPFMRX         r3, FPINST      @ FPINST (only if FPEXC.EX is set)
+       tst             r1, #FPEXC_FP2V @ is there an FPINST2 to read?
+       beq             1f
+       VFPFMRX         r12, FPINST2    @ FPINST2 if needed (and present)
 1:
-    stmia      r0, {r1, r2, r3, r12}   @ save FPEXC, FPSCR, FPINST, FPINST2
-    mov                pc, lr
+       stmia           r0, {r1, r2, r3, r12}   @ save FPEXC, FPSCR, FPINST, 
FPINST2
+       mov             pc, lr
+ENDPROC(rthal_vfp_save)
 
 /* Copied from no_old_VFP_process in arch/arm/vfp/vfphw.S
  * r0 = pointer to union vfp_state
  * r1 = current cpu
  */
 ENTRY(rthal_vfp_load)
-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 2, 0) \
-       || defined(CONFIG_VFP_3_2_BACKPORT)) && defined(CONFIG_SMP)
-    str        r1, [r0, #VFP_CPU]
+#ifdef CONFIG_SMP
+       str             r1, [r0, #VFP_CPU]
 #endif
-    VFPFLDMIA  r0, r2                  @ reload the working registers while
+       VFPFLDMIA       r0, r2          @ reload the working registers while
                                        @ FPEXC is in a safe state
-    ldmia      r0, {r1, r2, r3, r12}   @ load FPEXC, FPSCR, FPINST, FPINST2
-    tst                r1, #FPEXC_EX           @ is there additional state to 
restore?
-    beq                1f
-    VFPFMXR    FPINST, r3              @ restore FPINST (only if FPEXC.EX is 
set)
-    tst                r1, #FPEXC_FP2V         @ is there an FPINST2 to write?
-    beq                1f
-    VFPFMXR    FPINST2, r12    @ FPINST2 if needed (and present)
+       ldmia           r0, {r1, r2, r3, r12}   @ load FPEXC, FPSCR, FPINST, 
FPINST2
+       tst             r1, #FPEXC_EX   @ is there additional state to restore?
+       beq             1f
+       VFPFMXR         FPINST, r3      @ restore FPINST (only if FPEXC.EX is 
set)
+       tst             r1, #FPEXC_FP2V @ is there an FPINST2 to write?
+       beq             1f
+       VFPFMXR         FPINST2, r12    @ FPINST2 if needed (and present)
 1:
-    VFPFMXR    FPSCR, r2               @ restore status
-    mov                pc, lr
+       VFPFMXR         FPSCR, r2       @ restore status
+       mov             pc, lr
+ENDPROC(rthal_vfp_load)
 #endif
 
 /*
@@ -144,28 +145,34 @@ ENTRY(rthal_vfp_load)
  * r0 = previous task_struct, r1 = previous thread_info, r2 = next thread_info
  */
 ENTRY(rthal_thread_switch)
-    add     ip, r1, #TI_CPU_SAVE
-    ldr     r3, [r2, #TI_TP_VALUE]
-    stmia   ip!, {r4 - sl, fp, sp, lr}      @ Store most regs on stack
+       add     ip, r1, #TI_CPU_SAVE
+       ldr     r3, [r2, #TI_TP_VALUE]
+ ARM(  stmia   ip!, {r4 - sl, fp, sp, lr} )    @ Store most regs on stack
+ THUMB(        stmia   ip!, {r4 - sl, fp}         )    @ Store most regs on 
stack
+ THUMB(        str     sp, [ip], #4               )
+ THUMB(        str     lr, [ip], #4               )
 #ifdef USE_DOMAINS
-    ldr     r6, [r2, #TI_CPU_DOMAIN]
+       ldr     r6, [r2, #TI_CPU_DOMAIN]
 #endif
-
-    clear_exclusive_monitor
-    set_tls r3, r4, r5
+       clear_exclusive_monitor
+       set_tls r3, r4, r5
 #ifdef USE_DOMAINS
-    mcr     p15, 0, r6, c3, c0, 0           @ Set domain register
+       mcr     p15, 0, r6, c3, c0, 0           @ Set domain register
 #endif
-    fpu_switch r4
-    add            r4, r2, #TI_CPU_SAVE
-    ldmia   r4, {r4 - sl, fp, sp, pc}       @ Load all regs saved previously
+       fpu_switch r4
+ ARM(  add     r4, r2, #TI_CPU_SAVE       )
+ ARM(  ldmia   r4, {r4 - sl, fp, sp, pc}  )    @ Load all regs saved previously
+ THUMB(        add     ip, r2, #TI_CPU_SAVE       )
+ THUMB(        ldmia   ip!, {r4 - sl, fp}         )    @ Load all regs saved 
previously
+ THUMB(        ldr     sp, [ip], #4               )
+ THUMB(        ldr     pc, [ip]                   )
+ENDPROC(rthal_thread_switch)
 
 /*
  * r4 = xnarch_thread_trampoline
  * r5 = xnarchtcb_t *
  */
 ENTRY(rthal_thread_trampoline)
-    mov     r0, r5
-    mov     pc, r4
-
-// vim: ts=4 et sw=4 sts=4
+       mov     r0, r5
+       mov     pc, r4
+ENDPROC(rthal_thread_trampoline)


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