Module: xenomai-2.6
Branch: master
Commit: 89cb4933ec93d4e6209e2f681d1f932467d98db6
URL:    
http://git.xenomai.org/?p=xenomai-2.6.git;a=commit;h=89cb4933ec93d4e6209e2f681d1f932467d98db6

Author: Gilles Chanteperdrix <gilles.chanteperd...@xenomai.org>
Date:   Sat Sep  1 02:10:03 2012 +0200

hal/x86: dynamically detect tsc with I-pipe core API rev >= 2

---

 include/asm-x86/features_32.h |   16 ++++++++++------
 include/asm-x86/hal_32.h      |   10 ++++++----
 include/asm-x86/wrappers_32.h |    5 +++++
 ksrc/arch/x86/hal_32.c        |   14 +++++++-------
 4 files changed, 28 insertions(+), 17 deletions(-)

diff --git a/include/asm-x86/features_32.h b/include/asm-x86/features_32.h
index 11fc75a..3a3adc4 100644
--- a/include/asm-x86/features_32.h
+++ b/include/asm-x86/features_32.h
@@ -23,6 +23,7 @@
 #include <asm-generic/xenomai/features.h>
 
 #ifdef __KERNEL__
+#include <asm/xenomai/wrappers.h>
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
 /*
  * The kernel will deal dynamically with the actual SEP support
@@ -41,12 +42,15 @@
 /* The ABI revision level we use on this arch. */
 #define XENOMAI_ABI_REV   4UL
 
-#ifdef CONFIG_X86_TSC
-#define __xn_feat_x86_tsc_mask __xn_feat_x86_tsc
-#define XNARCH_HAVE_NONPRIV_TSC  1
-#else
-#define __xn_feat_x86_tsc_mask   0
-#endif
+#if defined(CONFIG_IPIPE_CORE) && IPIPE_CORE_APIREV >= 2
+#define __xn_feat_x86_tsc_mask \
+       (cpu_has_tsc ? __xn_feat_x86_tsc : 0)
+#elif defined(CONFIG_X86_TSC)
+#define __xn_feat_x86_tsc_mask __xn_feat_x86_tsc
+#define XNARCH_HAVE_NONPRIV_TSC        1
+#else /* !TSC */
+#define __xn_feat_x86_tsc_mask 0
+#endif /* !TSC */
 
 #ifdef CONFIG_XENO_X86_SEP
 #define __xn_feat_x86_sep_mask  __xn_feat_x86_sep
diff --git a/include/asm-x86/hal_32.h b/include/asm-x86/hal_32.h
index f98efc8..94861b7 100644
--- a/include/asm-x86/hal_32.h
+++ b/include/asm-x86/hal_32.h
@@ -45,7 +45,9 @@
 #else
 # define RTHAL_TIMER_DEVICE            "pit"
 #endif
-#ifdef CONFIG_X86_TSC
+#if defined(CONFIG_IPIPE_CORE) && IPIPE_CORE_APIREV >= 2
+# define RTHAL_CLOCK_DEVICE            (cpu_has_tsc ? "tsc" : "pit")
+#elif defined(CONFIG_X86_TSC)
 # define RTHAL_CLOCK_DEVICE            "tsc"
 #else
 # define RTHAL_CLOCK_DEVICE            "pit"
@@ -135,19 +137,19 @@ static inline void rthal_release_control(void)
        rthal_smi_restore();
 }
 
-#ifdef CONFIG_X86_TSC
+#ifdef RTHAL_USE_TSC
 static inline unsigned long long rthal_rdtsc(void)
 {
        unsigned long long t;
        rthal_read_tsc(t);
        return t;
 }
-#else /* !CONFIG_X86_TSC */
+#else /* !RTHAL_USE_TSC */
 #define RTHAL_8254_COUNT2LATCH  0xfffe
 void rthal_setup_8254_tsc(void);
 rthal_time_t rthal_get_8254_tsc(void);
 #define rthal_rdtsc() rthal_get_8254_tsc()
-#endif /* CONFIG_X86_TSC */
+#endif /* !RTHAL_USE_TSC */
 
 static inline void rthal_timer_program_shot(unsigned long delay)
 {
diff --git a/include/asm-x86/wrappers_32.h b/include/asm-x86/wrappers_32.h
index 2f1dcb9..ac5c4fc 100644
--- a/include/asm-x86/wrappers_32.h
+++ b/include/asm-x86/wrappers_32.h
@@ -250,4 +250,9 @@ typedef union thread_xstate x86_fpustate;
 #define x86_fpustate_ptr(t) ((t)->fpu.state)
 #endif
 
+#if defined(CONFIG_X86_TSC) || \
+       (defined(CONFIG_IPIPE_CORE) && IPIPE_CORE_APIREV >= 2)
+#define RTHAL_USE_TSC
+#endif
+
 #endif /* _XENO_ASM_X86_WRAPPERS_32_H */
diff --git a/ksrc/arch/x86/hal_32.c b/ksrc/arch/x86/hal_32.c
index f009642..388cbb0 100644
--- a/ksrc/arch/x86/hal_32.c
+++ b/ksrc/arch/x86/hal_32.c
@@ -282,7 +282,7 @@ void rthal_timer_release(int cpu)
 
 #endif /* !CONFIG_X86_LOCAL_APIC */
 
-#ifndef CONFIG_X86_TSC
+#ifndef RTHAL_USE_TSC
 
 static rthal_time_t rthal_tsc_8254;
 
@@ -337,7 +337,7 @@ rthal_time_t rthal_get_8254_tsc(void)
        return t;
 }
 
-#endif /* !CONFIG_X86_TSC */
+#endif /* !RTHAL_USE_TSC */
 
 int rthal_arch_init(void)
 {
@@ -363,14 +363,14 @@ int rthal_arch_init(void)
 #endif /* !I-pipe core */
 
        if (rthal_cpufreq_arg == 0)
-#ifdef CONFIG_X86_TSC
+#ifdef RTHAL_USE_TSC
                /* FIXME: 4Ghz barrier is close... */
                rthal_cpufreq_arg = rthal_get_cpufreq();
-#else /* ! CONFIG_X86_TSC */
+#else /* !RTHAL_USE_TSC */
                rthal_cpufreq_arg = CLOCK_TICK_RATE;
 
        rthal_setup_8254_tsc();
-#endif /* CONFIG_X86_TSC */
+#endif /* !RTHAL_USE_TSC */
 
        if (rthal_clockfreq_arg == 0)
                rthal_clockfreq_arg = rthal_get_clockfreq();
@@ -400,6 +400,6 @@ void rthal_arch_cleanup(void)
 
 EXPORT_SYMBOL_GPL(rthal_arch_init);
 EXPORT_SYMBOL_GPL(rthal_arch_cleanup);
-#ifndef CONFIG_X86_TSC
+#ifndef RTHAL_USE_TSC
 EXPORT_SYMBOL_GPL(rthal_get_8254_tsc);
-#endif /* !CONFIG_X86_TSC */
+#endif /* !RTHAL_USE_TSC */


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