Module: xenomai-2.6
Branch: master
Commit: 787f3aea43a6f8be68e3d41de78825b6e2c59469
URL:    
http://git.xenomai.org/?p=xenomai-2.6.git;a=commit;h=787f3aea43a6f8be68e3d41de78825b6e2c59469

Author: Jan Kiszka <jan.kis...@siemens.com>
Date:   Mon Jan  7 18:36:19 2013 +0100

testsuite: Enhance mprotect regression test with r/w after access enable

This triggers the I-pipe bug where a region is first inaccessible, thus
no page directory entries are reserved, and then made accessible via
mprotect. I-pipe tend to make the zero page writable on the access
pattern read-before-write.

Signed-off-by: Jan Kiszka <jan.kis...@siemens.com>

---

 src/testsuite/regression/posix/mprotect.c |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/src/testsuite/regression/posix/mprotect.c 
b/src/testsuite/regression/posix/mprotect.c
index 99b619e..3c4956b 100644
--- a/src/testsuite/regression/posix/mprotect.c
+++ b/src/testsuite/regression/posix/mprotect.c
@@ -91,6 +91,16 @@ int main(int argc, char **argv)
        check_value("read zero", zero_mem[0], 0);
 
        pthread_set_mode_np(PTHREAD_WARNSW, 0);
+
+       test1_mem = check_mmap(mmap(0, MEMSIZE, PROT_NONE,
+                                   MAP_PRIVATE | MAP_ANONYMOUS, 0, 0));
+       check_unix(mprotect(test1_mem, MEMSIZE, PROT_READ | PROT_WRITE));
+
+       printf("memory read/write after access enable\n");
+       check_value("read mem", test1_mem[0], 0);
+       test1_mem[0] = 0xff;
+       check_value("read zero", zero_mem[0], 0);
+
        fprintf(stderr, "Test OK\n");
 
        return 0;


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