Module: xenomai-forge
Branch: next
Commit: a1d4bd35d92f692f189494b8ba0e7530ab9128e7
URL:
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=a1d4bd35d92f692f189494b8ba0e7530ab9128e7
Author: Gilles Chanteperdrix <gilles.chanteperd...@xenomai.org>
Date: Wed Jun 5 08:03:39 2013 +0200
arm: be flexible with selecting unlocked context switch on SMP
Starting with Linux 3.8, due to the change in the ASID roll-over
mechanism, we can disable unlocked context switch on SMP platforms,
which improves user-space scheduling latency and may provide a more
interesting trade-off especially since SMP platforms do not flush the
cache on mm switch, so have short mm switch time.
So, replace the Kconfig check that was forcing unlocked context switch
on SMP, with a compile-time check, which takes the kernel version into
account.
---
include/asm-arm/wrappers.h | 5 +++++
kernel/cobalt/arch/arm/Kconfig | 10 +++++-----
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/include/asm-arm/wrappers.h b/include/asm-arm/wrappers.h
index cf1f1cc..ec72d52 100644
--- a/include/asm-arm/wrappers.h
+++ b/include/asm-arm/wrappers.h
@@ -40,6 +40,11 @@
#define vfp_current_hw_state last_VFP_context
#endif /* Linux < 3.1 */
+#if defined(CONFIG_SMP) && !defined(CONFIG_XENO_HW_UNLOCKED_SWITCH) && \
+ LINUX_VERSION_CODE < KERNEL_VERSION(3,8,0)
+#error "ARM/smp requires CONFIG_XENO_HW_UNLOCKED_SWITCH for kernel < 3.8.0"
+#endif
+
static inline void fp_init(union fp_state *state)
{
/* FIXME: This is insufficient. */
diff --git a/kernel/cobalt/arch/arm/Kconfig b/kernel/cobalt/arch/arm/Kconfig
index 4045310..e89049b 100644
--- a/kernel/cobalt/arch/arm/Kconfig
+++ b/kernel/cobalt/arch/arm/Kconfig
@@ -2,8 +2,8 @@ menu "Hardware options"
config IPIPE_WANT_PREEMPTIBLE_SWITCH
bool
- default y if (XENO_HW_UNLOCKED_SWITCH || SMP)
- default n if !XENO_HW_UNLOCKED_SWITCH && !SMP
+ default y if XENO_HW_UNLOCKED_SWITCH
+ default n if !XENO_HW_UNLOCKED_SWITCH
config IPIPE_WANT_ACTIVE_MM
def_bool y
@@ -29,10 +29,10 @@ config XENO_HW_UNLOCKED_SWITCH
and/or local interrupts may execute concurrently.
This option reduces interrupt latency when costly cache and
- TLB flushes are required to switch context, and may improve
- concurrency on some SMP/multi-core systems as well.
+ TLB flushes are required to switch context, and is mandatory
+ on SMP/multi-core ARM platforms prior to kernel 3.8.0.
- You definitely want to enable that option on embedded ARM
+ You definitely want to enable that option on low-end ARM
platforms.
endmenu
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