Module: xenomai-3
Branch: next
Commit: bca687971ec5fbec89b026e8812337474bebc7e2
URL:    
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=bca687971ec5fbec89b026e8812337474bebc7e2

Author: Philippe Gerum <r...@xenomai.org>
Date:   Thu Nov 13 16:28:32 2014 +0100

cobalt/powerpc: use regular context switch routines

Since we don't have to care for hybrid scheduling anymore
(i.e. involving foreign/non-linux stack contexts), we may use the
regular context switching code, both for 32 and 64bit ports.

---

 kernel/cobalt/arch/powerpc/Makefile    |    2 +-
 kernel/cobalt/arch/powerpc/switch_32.S |  111 ---------------------
 kernel/cobalt/arch/powerpc/switch_64.S |  168 --------------------------------
 kernel/cobalt/arch/powerpc/thread.c    |    6 +-
 4 files changed, 4 insertions(+), 283 deletions(-)

diff --git a/kernel/cobalt/arch/powerpc/Makefile 
b/kernel/cobalt/arch/powerpc/Makefile
index adfca75..4e728d5 100644
--- a/kernel/cobalt/arch/powerpc/Makefile
+++ b/kernel/cobalt/arch/powerpc/Makefile
@@ -1,7 +1,7 @@
 
 obj-$(CONFIG_XENOMAI) += xenomai.o
 
-xenomai-y := machine.o mayday.o thread.o switch_$(CONFIG_WORD_SIZE).o
+xenomai-y := machine.o mayday.o thread.o
 
 xenomai-$(CONFIG_XENO_ARCH_FPU) += fpu.o
 
diff --git a/kernel/cobalt/arch/powerpc/switch_32.S 
b/kernel/cobalt/arch/powerpc/switch_32.S
deleted file mode 100644
index 0188083..0000000
--- a/kernel/cobalt/arch/powerpc/switch_32.S
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * Most of the following code has been lifted from the original _switch()
- * routine from linux/arch/powerpc/kernel/entry.S.
- *
- * Xenomai updates Copyright (C) 2004 Philippe Gerum.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
- * USA; either version 2 of the License, or (at your option) any later
- * version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#include <linux/version.h>
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/ppc_asm.h>
-#include <asm/cputable.h>
-#include <asm/asm-offsets.h>
-#include <asm/ptrace.h>
-
-/*
- * struct task_struct *
- * __asm_thread_switch(struct thread_struct *prev, struct thread_struct *next)
- */
-       .align  7
-_GLOBAL(__asm_thread_switch)
-       stwu    r1,-INT_FRAME_SIZE(r1)
-       mflr    r0
-       stw     r0,INT_FRAME_SIZE+4(r1)
-       SAVE_NVGPRS(r1)
-       stw     r0,_NIP(r1)     /* Return to switch caller */
-       mfmsr   r11
-       rlwinm  r0,r11,0,17,15  /* clear MSR_EE in r0 */
-       MTMSRD(r11)
-       isync
-       li      r0,MSR_FP       /* Disable floating-point */
-#ifdef CONFIG_ALTIVEC
-BEGIN_FTR_SECTION
-       oris    r0,r0,MSR_VEC@h /* Disable altivec */
-       mfspr   r12,SPRN_VRSAVE /* save vrsave register value */
-       stw     r12,THREAD_VRSAVE(r3)
-END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-#endif /* CONFIG_ALTIVEC */
-#ifdef CONFIG_SPE
-#ifdef CPU_FTR_SPE
-BEGIN_FTR_SECTION
-#endif
-       oris    r0,r0,MSR_SPE@h  /* Disable SPE */
-       mfspr   r12,SPRN_SPEFSCR /* save spefscr register value */
-       stw     r12,THREAD_SPEFSCR(r3)
-#ifdef CPU_FTR_SPE
-END_FTR_SECTION_IFSET(CPU_FTR_SPE)
-#endif
-#endif /* CONFIG_SPE */
-       and.    r0,r0,r11       /* FP or altivec or SPE enabled? */
-       beq+    1f
-       andc    r11,r11,r0
-       MTMSRD(r11)
-       isync
-1:     stw     r11,_MSR(r1)
-       mfcr    r10
-       stw     r10,_CCR(r1)
-       stw     r1,KSP(r3)      /* Save old stack pointer */
-
-#ifdef CONFIG_SMP
-       sync
-#endif /* CONFIG_SMP */
-
-       lwz     r1,KSP(r4)      /* Load new stack pointer */
-       mr      r3,r2
-       lwz     r0,PGDIR(r4)
-       tophys(r0,r4)
-       CLR_TOP32(r0)
-       mtspr   SPRN_SPRG3,r0   /* Update current THREAD phys addr */
-       addi    r2,r4,-THREAD   /* Update current */
-
-#ifdef CONFIG_ALTIVEC
-BEGIN_FTR_SECTION
-       lwz     r0,THREAD_VRSAVE(r4)
-       mtspr   SPRN_VRSAVE,r0          /* if G4, restore VRSAVE reg */
-END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-#endif /* CONFIG_ALTIVEC */
-#ifdef CONFIG_SPE
-#ifdef CPU_FTR_SPE
-BEGIN_FTR_SECTION
-#endif
-       lwz     r0,THREAD_SPEFSCR(r4)
-       mtspr   SPRN_SPEFSCR,r0         /* restore SPEFSCR reg */
-#ifdef CPU_FTR_SPE
-END_FTR_SECTION_IFSET(CPU_FTR_SPE)
-#endif
-#endif /* CONFIG_SPE */
-
-       lwz     r0,_CCR(r1)
-       mtcrf   0xFF,r0
-       REST_NVGPRS(r1)
-
-       lwz     r4,_NIP(r1)
-       mtlr    r4
-       addi    r1,r1,INT_FRAME_SIZE
-       blr
diff --git a/kernel/cobalt/arch/powerpc/switch_64.S 
b/kernel/cobalt/arch/powerpc/switch_64.S
deleted file mode 100644
index 2b88b66..0000000
--- a/kernel/cobalt/arch/powerpc/switch_64.S
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * Most of the following code has been lifted from the original _switch()
- * routine from linux/arch/powerpc/kernel/entry_64.S.
- *
- * Xenomai updates Copyright (C) 2004 Philippe Gerum.
- *
- * 64-bit PowerPC adoption
- *   copyright (C) 2005 Taneli Vähäkangas and Heikki Lindholm 
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139,
- * USA; either version 2 of the License, or (at your option) any later
- * version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
- */
-
-#include <linux/version.h>
-#include <asm/processor.h>
-#include <asm/thread_info.h>
-#include <asm/cputable.h>
-#include <asm/ppc_asm.h>
-#include <asm/asm-offsets.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/ptrace.h>
-
-/*
- * struct task_struct *
- * __asm_thread_switch(struct thread_struct *prev, struct thread_struct *next)
- */
-_GLOBAL(__asm_thread_switch)
-       mflr    r0
-       std     r0,16(r1)
-       stdu    r1,-SWITCH_FRAME_SIZE(r1)
-       /* r3-r13 are caller saved -- Cort */
-       SAVE_8GPRS(14, r1)
-       SAVE_10GPRS(22, r1)
-       mflr    r20             /* Return to switch caller */
-       mfmsr   r22
-#ifdef CONFIG_PPC_BOOK3E
-       wrteei  0
-#else
-       rldicl  r0,r22,48,1     /* clear MSR_EE */
-       rotldi  r0,r0,16
-       MTMSRD(r0)
-       isync
-#endif /* CONFIG_PPC_BOOK3E */
-       li      r0, MSR_FP
-#ifdef CONFIG_VSX
-BEGIN_FTR_SECTION
-       oris    r0,r0,MSR_VSX@h /* Disable VSX */
-END_FTR_SECTION_IFSET(CPU_FTR_VSX)
-#endif /* CONFIG_VSX */
-#ifdef CONFIG_ALTIVEC
-BEGIN_FTR_SECTION
-       oris    r0,r0,MSR_VEC@h /* Disable altivec */
-       mfspr   r24,SPRN_VRSAVE /* save vrsave register value */
-       std     r24,THREAD_VRSAVE(r3)
-END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-#endif /* CONFIG_ALTIVEC */
-       and.    r0,r0,r22
-       beq+    1f
-       andc    r22,r22,r0
-       MTMSRD(r22)
-       isync
-1:     std     r20,_NIP(r1)
-       mfcr    r23
-       std     r23,_CCR(r1)
-       std     r1,KSP(r3)      /* Set old stack pointer */
-
-#ifdef CONFIG_SMP
-       /* We need a sync somewhere here to make sure that if the
-        * previous task gets rescheduled on another CPU, it sees all
-        * stores it has performed on this one.
-        */
-       sync
-#endif /* CONFIG_SMP */
-
-       ld      r8,KSP(r4)      /* new stack pointer */
-       ld      r3,PACACURRENT(r13) /* we must return "prev" when paired to 
switch_to() */
-
-       addi    r6,r4,-THREAD   /* Convert THREAD to 'current' */
-       std     r6,PACACURRENT(r13)     /* Set new 'current' */
-#ifdef CONFIG_PPC_BOOK3S
-BEGIN_FTR_SECTION
-  BEGIN_FTR_SECTION_NESTED(95)
-       clrrdi  r6,r8,28        /* get its ESID */
-       clrrdi  r9,r1,28        /* get current sp ESID */
-  FTR_SECTION_ELSE_NESTED(95)
-       clrrdi  r6,r8,40        /* get its 1T ESID */
-       clrrdi  r9,r1,40        /* get current sp 1T ESID */
-  ALT_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_1T_SEGMENT, 95)
-FTR_SECTION_ELSE
-       b       2f
-ALT_FTR_SECTION_END_IFSET(MMU_FTR_SLB)
-       clrldi. r0,r6,2         /* is new ESID c00000000? */
-       cmpd    cr1,r6,r9       /* or is new ESID the same as current ESID? */
-       cror    eq,4*cr1+eq,eq
-       beq     2f              /* if yes, don't slbie it */
-
-       /* Bolt in the new stack SLB entry */
-       ld      r7,KSP_VSID(r4) /* Get new stack's VSID */
-       oris    r0,r6,(SLB_ESID_V)@h
-       ori     r0,r0,(SLB_NUM_BOLTED-1)@l
-BEGIN_FTR_SECTION
-       li      r9,MMU_SEGSIZE_1T       /* insert B field */
-       oris    r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
-       rldimi  r7,r9,SLB_VSID_SSIZE_SHIFT,0
-END_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
-
-       /* Update the last bolted SLB.  No write barriers are needed
-        * here, provided we only update the current CPU's SLB shadow
-        * buffer.
-        */
-       ld      r9,PACA_SLBSHADOWPTR(r13)
-       li      r12,0
-       std     r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
-       std     r7,SLBSHADOW_STACKVSID(r9)  /* Save VSID */
-       std     r0,SLBSHADOW_STACKESID(r9)  /* Save ESID */
-
-       /* No need to check for CPU_FTR_NO_SLBIE_B here, since when
-        * we have 1TB segments, the only CPUs known to have the errata
-        * only support less than 1TB of system memory and we'll never
-        * actually hit this code path.
-        */
-
-       slbie   r6
-       slbie   r6              /* Workaround POWER5 < DD2.1 issue */
-       slbmte  r7,r0
-       isync
-2:
-#endif /* !CONFIG_PPC_BOOK3S */
-       clrrdi  r7,r8,THREAD_SHIFT      /* base of new stack */
-       /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
-          because we don't need to leave the 288-byte ABI gap at the
-          top of the kernel stack. */
-       addi    r7,r7,THREAD_SIZE-SWITCH_FRAME_SIZE
-       std     r7,PACAKSAVE(r13)
-
-11:
-       mr      r1,r8           /* start using new stack pointer */
-       ld      r6,_CCR(r1)
-       mtcrf   0xFF,r6
-
-#ifdef CONFIG_ALTIVEC
-BEGIN_FTR_SECTION
-       ld      r0,THREAD_VRSAVE(r4)
-       mtspr   SPRN_VRSAVE,r0          /* if G4, restore VRSAVE reg */
-END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-#endif /* CONFIG_ALTIVEC */
-
-       /* r3-r13 are destroyed -- Cort */
-       REST_8GPRS(14, r1)
-       REST_10GPRS(22, r1)
-
-       ld      r7,_NIP(r1)     /* Return to _switch caller in new task */
-       mtlr    r7
-       addi    r1,r1,SWITCH_FRAME_SIZE
-       blr
diff --git a/kernel/cobalt/arch/powerpc/thread.c 
b/kernel/cobalt/arch/powerpc/thread.c
index a648ba1..3dae95a 100644
--- a/kernel/cobalt/arch/powerpc/thread.c
+++ b/kernel/cobalt/arch/powerpc/thread.c
@@ -27,8 +27,7 @@
 #include <cobalt/kernel/thread.h>
 
 asmlinkage struct task_struct *
-__asm_thread_switch(struct thread_struct *prev,
-                   struct thread_struct *next);
+_switch(struct thread_struct *prev, struct thread_struct *next);
 
 void xnarch_switch_to(struct xnthread *out, struct xnthread *in)
 {
@@ -56,7 +55,8 @@ void xnarch_switch_to(struct xnthread *out, struct xnthread 
*in)
                        enter_lazy_tlb(prev_mm, next);
        }
 
-       __asm_thread_switch(out_tcb->core.tsp, in_tcb->core.tsp);
+       hard_local_irq_disable();
+       _switch(out_tcb->core.tsp, in_tcb->core.tsp);
 }
 
 #ifdef CONFIG_XENO_ARCH_FPU


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