Module: xenomai-3
Branch: next
Commit: 1f34e06120ccde12cd28a447289f2b5d859979bc
URL:    
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=1f34e06120ccde12cd28a447289f2b5d859979bc

Author: Philippe Gerum <r...@xenomai.org>
Date:   Fri Mar 20 09:25:13 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 ....14.44-arm-11.patch => ipipe-core-3.14.44-arm-12.patch} |    8 ++++----
 ...-3.18.12-arm-3.patch => ipipe-core-3.18.12-arm-4.patch} |   12 ++++++------
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
index eab2937..c44d632 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
@@ -1590,7 +1590,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 0000000..5ec5eff
+index 0000000..50e20e3
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1638,7 +1638,7 @@ index 0000000..5ec5eff
 +#include <linux/jump_label.h>
 +#include <linux/ipipe_trace.h>
 +
-+#define IPIPE_CORE_RELEASE    11
++#define IPIPE_CORE_RELEASE    12
 +
 +struct ipipe_domain;
 +
@@ -2863,7 +2863,7 @@ index 0000000..6579eec
 +
 +#endif
 diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
-index 8d6a089..d78ed9a 100644
+index 8d6a089..60c89d6 100644
 --- a/arch/arm/include/asm/setup.h
 +++ b/arch/arm/include/asm/setup.h
 @@ -53,4 +53,10 @@ extern int arm_add_memory(u64 start, u64 size);
@@ -2871,7 +2871,7 @@ index 8d6a089..d78ed9a 100644
  extern void dump_machine_table(void);
  
 +#ifdef CONFIG_IPIPE
-+void __init smp_build_cpu_revmap(void);
++void smp_build_cpu_revmap(void);
 +#else
 +static inline void smp_build_cpu_revmap(void) { }
 +#endif
diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
index ea9675d..e6360b7 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
@@ -1651,7 +1651,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 0000000..4701f8d
+index 0000000..3c73753
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1699,7 +1699,7 @@ index 0000000..4701f8d
 +#include <linux/jump_label.h>
 +#include <linux/ipipe_trace.h>
 +
-+#define IPIPE_CORE_RELEASE    3
++#define IPIPE_CORE_RELEASE    4
 +
 +struct ipipe_domain;
 +
@@ -2923,7 +2923,7 @@ index 0000000..6579eec
 +
 +#endif
 diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
-index e0adb9f..f024d86 100644
+index e0adb9f..5876f4b 100644
 --- a/arch/arm/include/asm/setup.h
 +++ b/arch/arm/include/asm/setup.h
 @@ -25,4 +25,10 @@ extern int arm_add_memory(u64 start, u64 size);
@@ -2931,7 +2931,7 @@ index e0adb9f..f024d86 100644
  extern void dump_machine_table(void);
  
 +#ifdef CONFIG_IPIPE
-+void __init smp_build_cpu_revmap(void);
++void smp_build_cpu_revmap(void);
 +#else
 +static inline void smp_build_cpu_revmap(void) { }
 +#endif
@@ -17772,7 +17772,7 @@ index 0000000..797a849
 +}
 diff --git a/kernel/ipipe/core.c b/kernel/ipipe/core.c
 new file mode 100644
-index 0000000..b8eb85c
+index 0000000..fba38fa
 --- /dev/null
 +++ b/kernel/ipipe/core.c
 @@ -0,0 +1,1890 @@
@@ -19030,7 +19030,7 @@ index 0000000..b8eb85c
 +       *   handling interrupts:
 +       *
 +       *   a) the root domain is alone, no registered head domain
-+       *      => all interrupts are delivered via the fast dispatcher.
++       *      => all interrupts go through the interrupt log
 +       *   b) a head domain is registered
 +       *      => head domain IRQs go through the fast dispatcher
 +       *      => root domain IRQs go through the interrupt log


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