we found this: http://stackoverflow.com/questions/9857760/can-an-arm-interrupt-occur-in-mid-instruction and are considering which impact that has on machinekit, which uses doubles in memory shared between threads, relying on updates being atomic
I wonder if this topic has come up in the Xenomai context? specifically - can it happen that an RT thread is rescheduled in the middle of a 64bit store? also, I found that for older ARM's there are kernel mode helpers to support 64bit atomics (https://www.kernel.org/doc/Documentation/arm/kernel_user_helpers.txt) - I assume those work fine with Xenomai? sorry about the fuzzy question - still trying to figure if/how this affects us - Michael _______________________________________________ Xenomai mailing list [email protected] http://www.xenomai.org/mailman/listinfo/xenomai
