(1) Remove operating system checks - asm sync instructions
work regardless of the operating system
(2) Replace 8 nops with proper sync instruction on MIPS
(3) Replace SPARC voodoo with proper sync instructions as
suggested by [email protected] and used by NetBSD
(4) Rename eieio() to mem_barrier() to match others
Signed-off-by: Matt Turner <[email protected]>
---
hw/xfree86/common/compiler.h | 95 ++++++++++++++++++++----------------------
1 files changed, 45 insertions(+), 50 deletions(-)
diff --git a/hw/xfree86/common/compiler.h b/hw/xfree86/common/compiler.h
index 72e1fe6..9a2030b 100644
--- a/hw/xfree86/common/compiler.h
+++ b/hw/xfree86/common/compiler.h
@@ -86,13 +86,11 @@
# ifndef NO_INLINE /* XXX: why can't NO_INLINE be defined? */
# ifdef __GNUC__
- /* DEC Alpha and (Linux or BSD) */
-# if defined(__alpha__) && (defined(linux) || defined(__FreeBSD__) ||
defined(__NetBSD__) || defined(__OpenBSD__))
+# if defined(__alpha__)
# define mem_barrier() __asm__ __volatile__("mb" :::"memory")
# define write_mem_barrier() __asm__ __volatile__("wmb":::"memory")
- /* IA64 and Linux */ /* XXX: no BSD? */
-# elif defined(__ia64__) && defined(linux)
+# elif defined(__ia64__)
# ifndef __INTEL_COMPILER
# define mem_barrier() __asm__ __volatile__("mf":::"memory")
# else
@@ -100,47 +98,44 @@
# define mem_barrier() __mf()
# endif
- /* AMD64 and (Linux or FreeBSD) */ /* XXX: no Open or Net BSD? */
-# elif defined(__amd64__) && (defined(linux) || defined(__FreeBSD__))
+# elif defined(__amd64__)
# define mem_barrier() __asm__ __volatile__("mfence":::"memory")
# define write_ mem_barrier() __asm__ __volatile__("sfence":::"memory")
- /* x86 and (Linux or FreeBSD */ /* XXX: check on Open/Net BSDs */
-# elif defined(__i386__) && (defined(linux) || defined(__FreeBSD__))
- /* XXX: mfence is better for mem_barrier() on CPUs with SSE2 support */
+# elif defined(__i386__)
+ /* XXX: mfence is better for mem_barrier() on CPUs with SSE2 support */
# define mem_barrier() \
__asm__ __volatile__("lock; addl $0,0(%%esp)":::"memory")
/* XXX: write_mem_barrier() can either be the lock; addl sequence,
- * or preferably (on CPUs with SSE) sfence */
-
- /* SPARC and (Linux or Sun or OpenBSD or FreeBSD) */ /* XXX: no NetBSD? */
/* XXX: what is sun? */
-# elif defined(__sparc__) && (defined(linux) || defined(sun) ||
defined(__OpenBSD__) || defined(__FreeBSD__))
-# define barrier() __asm__ __volatile__(".word 0x8143e00a":::"memory") /*
XXX: WTF is this? */
-
- /* MIPS and Linux */ /* XXX: what about BSDs? */
-# elif defined(__mips__) && defined(__linux__)
- /* XXX: this seems like a hilariously bad idea... */
- /* XXX: what about the MIPS III 'sync' instruction? */
-# define mem_barrier() \
- __asm__ __volatile__( \
- "# prevent instructions being moved around\n\t" \
- ".set\tnoreorder\n\t" \
- "# 8 nops to fool the R4400 pipeline\n\t" \
- "nop;nop;nop;nop;nop;nop;nop;nop\n\t" \
- ".set\treorder" \
- : /* no output */ \
- : /* no input */ \
+ * or preferably (on CPUs with SSE) sfence */
+
+# elif defined(__sparc__)
+# define mem_barrier() \
+ __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
+ "membar #Lookaside\n" \
+ "1:\n" \
+ : : : "memory")
+# define write_mem_barrier() \
+ __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
+ "membar #StoreStore\n" \
+ "1:\n" \
+ : : : "memory")
+
+# elif defined(__mips__)
+ /* Note: sync instruction requires MIPS II instruction set */
+# define mem_barrier() \
+ __asm__ __volatile__( \
+ ".set push\n\t" \
+ ".set noreorder\n\t" \
+ ".set mips2\n\t" \
+ "sync\n\t" \
+ ".set pop" \
+ : /* no output */ \
+ : /* no input */ \
: "memory")
- /* PowerPC and (Linux or BSD) */
-# elif defined(__powerpc__) && (defined(linux) || defined(__OpenBSD__) ||
defined(__NetBSD__) || defined(__FreeBSD__))
- /* XXX: eieio never mentioned before this, following comment is bogus, so
- * what are we missing? */
-# ifndef eieio /* We deal with arch-specific eieio() routines above... */
-# define eieio() __asm__ __volatile__("eieio":::"memory")
-# endif /* eieio */
- /* XXX: any reason we can't rename eieio() mem_barrier() to match others?
*/
-# define mem_barrier() eieio()
+# elif defined(__powerpc__)
+# define mem_barrier() __asm__ __volatile__("eieio":::"memory")
# endif
# endif /* __GNUC__ */
# endif /* NO_INLINE */
@@ -594,7 +589,7 @@ outb(unsigned long port, unsigned char val)
__asm__ __volatile__("stba %0, [%1] %2"
: /* No outputs */
: "r" (val), "r" (port), "i" (ASI_PL));
- barrier();
+ write_mem_barrier();
}
static __inline__ void
@@ -603,7 +598,7 @@ outw(unsigned long port, unsigned short val)
__asm__ __volatile__("stha %0, [%1] %2"
: /* No outputs */
: "r" (val), "r" (port), "i" (ASI_PL));
- barrier();
+ write_mem_barrier();
}
static __inline__ void
@@ -612,7 +607,7 @@ outl(unsigned long port, unsigned int val)
__asm__ __volatile__("sta %0, [%1] %2"
: /* No outputs */
: "r" (val), "r" (port), "i" (ASI_PL));
- barrier();
+ write_mem_barrier();
}
static __inline__ unsigned int
@@ -714,7 +709,7 @@ xf86WriteMmio8(__volatile__ void *base, const unsigned long
offset,
__asm__ __volatile__("stba %0, [%1] %2"
: /* No outputs */
: "r" (val), "r" (addr), "i" (ASI_PL));
- barrier();
+ write_mem_barrier();
}
static __inline__ void
@@ -726,7 +721,7 @@ xf86WriteMmio16Be(__volatile__ void *base, const unsigned
long offset,
__asm__ __volatile__("sth %0, [%1]"
: /* No outputs */
: "r" (val), "r" (addr));
- barrier();
+ write_mem_barrier();
}
static __inline__ void
@@ -738,7 +733,7 @@ xf86WriteMmio16Le(__volatile__ void *base, const unsigned
long offset,
__asm__ __volatile__("stha %0, [%1] %2"
: /* No outputs */
: "r" (val), "r" (addr), "i" (ASI_PL));
- barrier();
+ write_mem_barrier();
}
static __inline__ void
@@ -750,7 +745,7 @@ xf86WriteMmio32Be(__volatile__ void *base, const unsigned
long offset,
__asm__ __volatile__("st %0, [%1]"
: /* No outputs */
: "r" (val), "r" (addr));
- barrier();
+ write_mem_barrier();
}
static __inline__ void
@@ -762,7 +757,7 @@ xf86WriteMmio32Le(__volatile__ void *base, const unsigned
long offset,
__asm__ __volatile__("sta %0, [%1] %2"
: /* No outputs */
: "r" (val), "r" (addr), "i" (ASI_PL));
- barrier();
+ write_mem_barrier();
}
static __inline__ void
@@ -1196,7 +1191,7 @@ xf86WriteMmio8(__volatile__ void *base, const unsigned
long offset,
const unsigned char val)
{
xf86WriteMmioNB8(base, offset, val);
- eieio();
+ write_mem_barrier();
}
static __inline__ void
@@ -1204,7 +1199,7 @@ xf86WriteMmio16Le(__volatile__ void *base, const unsigned
long offset,
const unsigned short val)
{
xf86WriteMmioNB16Le(base, offset, val);
- eieio();
+ write_mem_barrier();
}
static __inline__ void
@@ -1212,7 +1207,7 @@ xf86WriteMmio16Be(__volatile__ void *base, const unsigned
long offset,
const unsigned short val)
{
xf86WriteMmioNB16Be(base, offset, val);
- eieio();
+ write_mem_barrier();
}
static __inline__ void
@@ -1220,7 +1215,7 @@ xf86WriteMmio32Le(__volatile__ void *base, const unsigned
long offset,
const unsigned int val)
{
xf86WriteMmioNB32Le(base, offset, val);
- eieio();
+ write_mem_barrier();
}
static __inline__ void
@@ -1228,7 +1223,7 @@ xf86WriteMmio32Be(__volatile__ void *base, const unsigned
long offset,
const unsigned int val)
{
xf86WriteMmioNB32Be(base, offset, val);
- eieio();
+ write_mem_barrier();
}
--
1.6.0.6
_______________________________________________
xorg-devel mailing list
[email protected]
http://lists.x.org/mailman/listinfo/xorg-devel
